From patchwork Wed Dec 12 13:31:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Guittot X-Patchwork-Id: 13510 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id A916423E2A for ; Wed, 12 Dec 2012 13:32:39 +0000 (UTC) Received: from mail-ia0-f180.google.com (mail-ia0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 562BCA1999C for ; Wed, 12 Dec 2012 13:32:39 +0000 (UTC) Received: by mail-ia0-f180.google.com with SMTP id t4so848683iag.11 for ; Wed, 12 Dec 2012 05:32:38 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=RGp5IbTAmXyVPJfJztkPV3+VBhl1CbRIrxSvMx5YtDE=; b=GowWlqcSGjDxZIXpmjQ7iz3+MCkNyTKjlwRgvSd12fZkxFEN39TTz0Cu2y2zi3oevU U3aJoQr1pJcLKXF+BTbiDlis8xOByrh31/DMa9Td9pV7OBUVxTJWGzvv9holTSghjDAp ZuvSkZO//ccSkHjzw5FvYaohMXRvPV7PAXHX3Gxp/qELKAOWYp6LDc61/F98VygYOOdI c+Zmg1A9cJgOofg8VyeTiVFX9fvB7sdVxFNeK9xoPnNyTHpvXHASFy3kNfFZ1Bk/ofki nXjWOWlr9RHKrNIXsCbiWKzi7hbQ691FNbaz6SnFs2J92/s0T+/IsYk46v5SubMB8vSz Kmgw== Received: by 10.50.36.164 with SMTP id r4mr823823igj.57.1355319158807; Wed, 12 Dec 2012 05:32:38 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp199600igt; Wed, 12 Dec 2012 05:32:38 -0800 (PST) Received: by 10.180.33.202 with SMTP id t10mr1936281wii.3.1355319157788; Wed, 12 Dec 2012 05:32:37 -0800 (PST) Received: from mail-wi0-f174.google.com (mail-wi0-f174.google.com [209.85.212.174]) by mx.google.com with ESMTPS id q19si3796499wie.40.2012.12.12.05.32.37 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 12 Dec 2012 05:32:37 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.174 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) client-ip=209.85.212.174; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.174 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) smtp.mail=vincent.guittot@linaro.org Received: by mail-wi0-f174.google.com with SMTP id hm9so2993168wib.13 for ; Wed, 12 Dec 2012 05:32:37 -0800 (PST) Received: by 10.194.121.100 with SMTP id lj4mr1999161wjb.20.1355319157329; Wed, 12 Dec 2012 05:32:37 -0800 (PST) Received: from localhost.localdomain (LPuteaux-156-14-44-212.w82-127.abo.wanadoo.fr. [82.127.83.212]) by mx.google.com with ESMTPS id t17sm21269650wiv.6.2012.12.12.05.32.35 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 12 Dec 2012 05:32:36 -0800 (PST) From: Vincent Guittot To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linaro-dev@lists.linaro.org, peterz@infradead.org, mingo@kernel.org, linux@arm.linux.org.uk, pjt@google.com, santosh.shilimkar@ti.com, Morten.Rasmussen@arm.com, chander.kashyap@linaro.org, cmetcalf@tilera.com, tony.luck@intel.com Cc: alex.shi@intel.com, preeti@linux.vnet.ibm.com, paulmck@linux.vnet.ibm.com, tglx@linutronix.de, len.brown@intel.com, arjan@linux.intel.com, amit.kucheria@linaro.org, viresh.kumar@linaro.org, Vincent Guittot Subject: [RFC PATCH v2 6/6] ARM: sched: clear SD_SHARE_POWERLINE Date: Wed, 12 Dec 2012 14:31:32 +0100 Message-Id: <1355319092-30980-7-git-send-email-vincent.guittot@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1355319092-30980-1-git-send-email-vincent.guittot@linaro.org> References: <1355319092-30980-1-git-send-email-vincent.guittot@linaro.org> X-Gm-Message-State: ALoCoQnzVvBhPI/cLhTYLQ7dSZ1rf0cd70BDn8uvCHP7Gb9/Nfsej/ytg5ceqVFft+jDkfqBmyo6 The ARM platforms take advantage of packing small tasks on few cores. This is true even when the cores of a cluster can't be power gated independantly. So we clear SD_SHARE_POWERDOMAIN at MC and CPU level. Signed-off-by: Vincent Guittot --- arch/arm/kernel/topology.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 79282eb..f89a4a2 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -201,6 +201,15 @@ static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {} */ struct cputopo_arm cpu_topology[NR_CPUS]; +int arch_sd_local_flags(int level) +{ + /* Powergate at threading level doesn't make sense */ + if (level & SD_SHARE_CPUPOWER) + return 1*SD_SHARE_POWERDOMAIN; + + return 0*SD_SHARE_POWERDOMAIN; +} + const struct cpumask *cpu_coregroup_mask(int cpu) { return &cpu_topology[cpu].core_sibling;