From patchwork Sun Oct 7 07:43:58 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Guittot X-Patchwork-Id: 12039 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2635B23EFF for ; Sun, 7 Oct 2012 07:44:47 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id BC9BFA19443 for ; Sun, 7 Oct 2012 07:44:46 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id e10so6872053iej.11 for ; Sun, 07 Oct 2012 00:44:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=WYHoVXggd//voYw7BQbOxQ5D7o1ESoWfiwZf4apKuEw=; b=DT/jV9bPuLus/2GFQQXJ1mSmG6qWym1yjE1xDc0JCvVzBMrATIciBLxUD1ueVCSe9v hkgZYUhWz9JrYfq28lPu9wD5ug5Jr8YEP+e68m0XwpiWIjL7CL8h+Rse1YVFEU6yYGG1 9Pt8mqg36WYsriIXI+X54wOx3wPHbRT7CVmmYtaq3U05NqrJWXL00WlUghzh3gTlLmVR VVigia43aQyWtt7KD5YwnB2GJTn7OIORXPN53gq7OMJemQ4HA3OiiLhh4K+2UEyNgV0U GxQBPV/MpzMJvzLFddL/jYYamHcHjR/3I92+MxEAS9Njx1fpeYOWu7cJMUvYKZ2+9J9G 3Aag== Received: by 10.42.109.194 with SMTP id m2mr10237750icp.48.1349595886544; Sun, 07 Oct 2012 00:44:46 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.232 with SMTP id ex8csp39958igc; Sun, 7 Oct 2012 00:44:45 -0700 (PDT) Received: by 10.216.207.163 with SMTP id n35mr7871869weo.220.1349595885056; Sun, 07 Oct 2012 00:44:45 -0700 (PDT) Received: from mail-we0-f178.google.com (mail-we0-f178.google.com [74.125.82.178]) by mx.google.com with ESMTPS id d9si16984167wec.29.2012.10.07.00.44.44 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 07 Oct 2012 00:44:45 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) client-ip=74.125.82.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) smtp.mail=vincent.guittot@linaro.org Received: by mail-we0-f178.google.com with SMTP id r6so2260492wey.37 for ; Sun, 07 Oct 2012 00:44:44 -0700 (PDT) Received: by 10.180.91.169 with SMTP id cf9mr13318113wib.1.1349595884581; Sun, 07 Oct 2012 00:44:44 -0700 (PDT) Received: from lmenx30s.lme.st.com (pas72-1-88-161-60-229.fbx.proxad.net. [88.161.60.229]) by mx.google.com with ESMTPS id j8sm12495245wiy.9.2012.10.07.00.44.42 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 07 Oct 2012 00:44:43 -0700 (PDT) From: Vincent Guittot To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linaro-dev@lists.linaro.org, peterz@infradead.org, mingo@redhat.com, pjt@google.com, linux@arm.linux.org.uk Cc: Vincent Guittot Subject: [RFC 6/6] ARM: sched: clear SD_SHARE_POWERLINE Date: Sun, 7 Oct 2012 09:43:58 +0200 Message-Id: <1349595838-31274-7-git-send-email-vincent.guittot@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1349595838-31274-1-git-send-email-vincent.guittot@linaro.org> References: <1349595838-31274-1-git-send-email-vincent.guittot@linaro.org> X-Gm-Message-State: ALoCoQkSKDVDEkGPciyEbxvZX5U6ugce8/b6pzMsS1Q9KwKEO2134K8YYei4wE6aUJjKa2mKRIOz The ARM platforms take advantage of packing small tasks on few cores. This is true even when the cores of a cluster can't be powergated independantly. Signed-off-by: Vincent Guittot --- arch/arm/kernel/topology.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 26c12c6..00511d0 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -226,6 +226,11 @@ static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {} */ struct cputopo_arm cpu_topology[NR_CPUS]; +int arch_sd_share_power_line(void) +{ + return 0*SD_SHARE_POWERLINE; +} + const struct cpumask *cpu_coregroup_mask(int cpu) { return &cpu_topology[cpu].core_sibling;