From patchwork Fri Sep 14 13:49:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 11421 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 4DC572409F for ; Fri, 14 Sep 2012 13:50:09 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id F19CEA34C3A for ; Fri, 14 Sep 2012 13:50:07 +0000 (UTC) Received: by iafj25 with SMTP id j25so2982254iaf.11 for ; Fri, 14 Sep 2012 06:50:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; bh=+dsD9O8Vovc1o8eHHEiddhSnYUx/ILfaKJsByA8uhXw=; b=OCg14W/N0nV+f2M5FkostcvUhgbM8Tizl7CC6aKOqqv5QIrgsAUQF5xQlEWGG7BvH6 q78CpBMpz8ZuO6pqNZhCRRsG7iDehvJ4zRlWZOOriOcCPq2t38pNX2jHLyL2iM+9ypN+ 2+4PJ0kemGBV45eA7KCfrMpIyhPcZA60LsIlW8staH8f1LaVYBtibDGvMl4tNVLaSLGq qU00pzmtkjYNkUSBFkiT6Du8K5u3ANdBF0z2C5MZS3oZ2/jiyZwQm6CPUv/VcPnHyKMW /7Wa8LZ61XE48mvBe3ag9k2kDtRmporWC74uUyTrFkL4XPpmBCIvm6uqh/gbYZLIBH7C adkw== Received: by 10.50.195.134 with SMTP id ie6mr3249417igc.28.1347630607358; Fri, 14 Sep 2012 06:50:07 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.232 with SMTP id ex8csp191074igc; Fri, 14 Sep 2012 06:50:06 -0700 (PDT) Received: by 10.14.224.4 with SMTP id w4mr3674926eep.21.1347630604941; Fri, 14 Sep 2012 06:50:04 -0700 (PDT) Received: from eu1sys200aog114.obsmtp.com (eu1sys200aog114.obsmtp.com [207.126.144.137]) by mx.google.com with SMTP id z3si1058798een.120.2012.09.14.06.49.56 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 14 Sep 2012 06:50:04 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.137 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.137; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.137 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob114.postini.com ([207.126.147.11]) with SMTP ID DSNKUFM2BNCeuqbTS8qTwOcI4+j/2i3p6UXa@postini.com; Fri, 14 Sep 2012 13:50:04 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 772DAE7; Fri, 14 Sep 2012 13:41:38 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D02F015D3; Fri, 14 Sep 2012 13:49:51 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id AE48D24C2AB; Fri, 14 Sep 2012 15:49:43 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Fri, 14 Sep 2012 15:49:50 +0200 From: Linus Walleij To: , Cc: Stephen Warren , Anmar Oueja , Linus Walleij Subject: [PATCH v2] pinctrl: document semantics vs GPIO Date: Fri, 14 Sep 2012 15:49:47 +0200 Message-ID: <1347630587-31014-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQmLQCe+XYeSlnINy7t3kmFhZ/Ffnm+J2wKlr1Rp/TeSReB9ceEs3KtEmZqENUvI7pCxPREb From: Linus Walleij The semantics of the interactions between GPIO and pinctrl may be unclear, e.g. which one do you request first? This amends the documentation to make this clear. Reported-by: Domenico Andreoli Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Reworded a bit in accordance with Stephens feedback. --- Documentation/pinctrl.txt | 57 +++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 55 insertions(+), 2 deletions(-) diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt index 1479aca..e2dfc85 100644 --- a/Documentation/pinctrl.txt +++ b/Documentation/pinctrl.txt @@ -289,6 +289,11 @@ Interaction with the GPIO subsystem The GPIO drivers may want to perform operations of various types on the same physical pins that are also registered as pin controller pins. +First and foremost, the two subsystems can be used as completely orthogonal, +see the section named "pin control requests from drivers" and +"drivers needing both pin control and GPIOs" below for details. But in some +situations a cross-subsystem mapping between pins and GPIOs is needed. + Since the pin controller subsystem have its pinspace local to the pin controller we need a mapping so that the pin control subsystem can figure out which pin controller handles control of a certain GPIO pin. Since a single @@ -359,6 +364,7 @@ will get an pin number into its handled number range. Further it is also passed the range ID value, so that the pin controller knows which range it should deal with. + PINMUX interfaces ================= @@ -960,8 +966,8 @@ all get selected, and they all get enabled and disable simultaneously by the pinmux core. -Pinmux requests from drivers -============================ +Pin control requests from drivers +================================= Generally it is discouraged to let individual drivers get and enable pin control. So if possible, handle the pin control in platform code or some other @@ -969,6 +975,11 @@ place where you have access to all the affected struct device * pointers. In some cases where a driver needs to e.g. switch between different mux mappings at runtime this is not possible. +A typical case is if a driver needs to switch bias of pins from normal +operation and going to sleep, moving from the PINCTRL_STATE_DEFAULT to +PINCTRL_STATE_SLEEP at runtime, re-biasing or even re-muxing pins to save +current in sleep mode. + A driver may request a certain control state to be activated, usually just the default state like this: @@ -1058,6 +1069,48 @@ registered. Thus make sure that the error path in your driver gracefully cleans up and is ready to retry the probing later in the startup process. +Drivers needing both pin control and GPIOs +========================================== + +Again, it is discouraged to let drivers lookup and select pin control states +themselves, but again sometimes this is unavoidable. + +So say that your driver is fetching its resources like this: + +#include +#include + +struct pinctrl *pinctrl; +int gpio; + +pinctrl = devm_pinctrl_get_select_default(&dev); +gpio = devm_gpio_request(&dev, 14, "foo"); + +Here we first request a certain pin state and then request GPIO 14 to be +used. If you're using the subsystems orthogonally like this, you should +nominally always get your pinctrl handle and select the desired pinctrl +state BEFORE requesting the GPIO. This is a semantic convention to avoid +situations that can be electrically unpleasant, you will certainly want to +mux in and bias pins in a certain way before the GPIO subsystems starts to +deal with them. + +The above can be hidden: using pinctrl hogs, the pin control driver may be +setting up the config and muxing for the pins when it is probing, +nevertheless orthogonal to the GPIO subsystem. + +But there are also situations where it makes sense for the GPIO subsystem +to communicate directly with with the pinctrl subsystem, using the latter +as a back-end. This is when the GPIO driver may call out to the functions +described in the section "Pin control interaction with the GPIO subsystem" +above. This only involves per-pin multiplexing, and will be completely +hidden behind the gpio_*() function namespace. In this case, the driver +need not interact with the pin control subsystem at all. + +If a pin control driver and a GPIO driver is dealing with the same pins +and the use cases involve multiplexing, you MUST implement the pin controller +as a back-end for the GPIO driver like this. + + System pin control hogging ==========================