From patchwork Tue Mar 6 22:05:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 7123 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id C98AA23E74 for ; Tue, 6 Mar 2012 22:06:11 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 914A1A18710 for ; Tue, 6 Mar 2012 22:06:11 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id e36so10276262iag.11 for ; Tue, 06 Mar 2012 14:06:11 -0800 (PST) Received: by 10.50.158.133 with SMTP id wu5mr10000314igb.50.1331071571294; Tue, 06 Mar 2012 14:06:11 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.53.18 with SMTP id k18csp1065ibg; Tue, 6 Mar 2012 14:06:10 -0800 (PST) Received: by 10.213.33.200 with SMTP id i8mr35948ebd.206.1331071569745; Tue, 06 Mar 2012 14:06:09 -0800 (PST) Received: from eu1sys200aog109.obsmtp.com (eu1sys200aog109.obsmtp.com. [207.126.144.127]) by mx.google.com with SMTP id b42si13676506eec.47.2012.03.06.14.05.57 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 06 Mar 2012 14:06:09 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.127 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.127; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.127 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob109.postini.com ([207.126.147.11]) with SMTP ID DSNKT1aKQ6KzIzlNU3eeB/3Hpro18HXEp9Ms@postini.com; Tue, 06 Mar 2012 22:06:09 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 660F2C4; Tue, 6 Mar 2012 21:57:26 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 25703F20; Tue, 6 Mar 2012 22:05:51 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 9951E24C07C; Tue, 6 Mar 2012 23:05:39 +0100 (CET) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 6 Mar 2012 23:05:50 +0100 From: Linus Walleij To: , Cc: Stephen Warren , Shawn Guo , Thomas Abraham , Dong Aisheng , Rajendra Nayak , Haojian Zhuang , Linus Walleij Subject: [PATCH 4/4] ARM: u300: configure some pins as an example Date: Tue, 6 Mar 2012 23:05:47 +0100 Message-ID: <1331071547-25109-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.8 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQnP8vVD3cHgpu0q6Qg6bWEdOTh4gsiRL5XGQBOq4iCFTGLoDCq89lI13ER1NdG6Y3BuQOIz From: Linus Walleij To show how the pin configuration is used on the U300, let's include some configs for two GPIO pins. Signed-off-by: Linus Walleij --- arch/arm/mach-u300/core.c | 25 +++++++++++++++++++++++-- 1 files changed, 23 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index f326d31..ab48547 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -1605,7 +1606,23 @@ static struct platform_device dma_device = { }, }; -/* Pinmux settings */ +static unsigned long g0d_conf[] = { + PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0), +}; + +static unsigned long g1d_conf[] = { + PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0), +}; + +static unsigned long g0i_conf[] = { + PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0), +}; + +static unsigned long g1i_conf[] = { + PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0), +}; + +/* Pin control settings */ static struct pinctrl_map __initdata u300_pinmux_map[] = { /* anonymous maps for chip power and EMIFs */ PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "power"), @@ -1615,6 +1632,11 @@ static struct pinctrl_map __initdata u300_pinmux_map[] = { PIN_MAP_MUX_GROUP_DEFAULT("mmci", "pinctrl-u300", NULL, "mmc0"), PIN_MAP_MUX_GROUP_DEFAULT("pl022", "pinctrl-u300", NULL, "spi0"), PIN_MAP_MUX_GROUP_DEFAULT("uart0", "pinctrl-u300", NULL, "uart0"), + /* some pin configurations */ + PIN_MAP_CONFIGS_PIN_DEFAULT("mmci", "pinctrl-u300", "GPIO0", g0d_conf), + PIN_MAP_CONFIGS_PIN_DEFAULT("mmci", "pinctrl-u300", "GPIO1", g1d_conf), + PIN_MAP_CONFIGS_PIN("mmci", "idle", "pinctrl-u300", "GPIO0", g0i_conf), + PIN_MAP_CONFIGS_PIN("mmci", "idle", "pinctrl-u300", "GPIO1", g1i_conf), }; struct u300_mux_hog { @@ -1640,7 +1662,6 @@ static int __init u300_pinctrl_fetch(void) for (i = 0; i < ARRAY_SIZE(u300_mux_hogs); i++) { struct pinctrl *p; - int ret; p = pinctrl_get_select_default(u300_mux_hogs[i].dev); if (IS_ERR(p)) {