From patchwork Mon Nov 21 19:48:54 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 5243 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id EA18C23E0E for ; Mon, 21 Nov 2011 19:49:09 +0000 (UTC) Received: from mail-yw0-f52.google.com (mail-yw0-f52.google.com [209.85.213.52]) by fiordland.canonical.com (Postfix) with ESMTP id B6695A18479 for ; Mon, 21 Nov 2011 19:49:09 +0000 (UTC) Received: by mail-yw0-f52.google.com with SMTP id 5so7084273ywb.11 for ; Mon, 21 Nov 2011 11:49:09 -0800 (PST) Received: by 10.152.111.170 with SMTP id ij10mr6740171lab.5.1321904948928; Mon, 21 Nov 2011 11:49:08 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.41.198 with SMTP id h6cs139934lal; Mon, 21 Nov 2011 11:49:08 -0800 (PST) Received: by 10.213.32.15 with SMTP id a15mr724078ebd.55.1321904946487; Mon, 21 Nov 2011 11:49:06 -0800 (PST) Received: from eu1sys200aog104.obsmtp.com (eu1sys200aog104.obsmtp.com. [207.126.144.117]) by mx.google.com with SMTP id w43si2622712eeb.89.2011.11.21.11.49.00 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 21 Nov 2011 11:49:06 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.117 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.117; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.117 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob104.postini.com ([207.126.147.11]) with SMTP ID DSNKTsqrKz4l97BOI8HGiD6XEKEqcwghAqyr@postini.com; Mon, 21 Nov 2011 19:49:06 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id F0AA892; Mon, 21 Nov 2011 19:48:57 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9784F2C0D; Mon, 21 Nov 2011 19:48:57 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id A501224C075; Mon, 21 Nov 2011 20:48:47 +0100 (CET) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 21 Nov 2011 20:48:56 +0100 From: Linus Walleij To: Cc: Stephen Warren , Grant Likely , Barry Song <21cnbao@gmail.com>, Shawn Guo , Thomas Abraham , Dong Aisheng , Rajendra Nayak , Linus Walleij Subject: [PATCH 7/8] pinctrl: COH901XXX: use pinconf enums and parameters Date: Mon, 21 Nov 2011 20:48:54 +0100 Message-ID: <1321904934-32477-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.3.2 MIME-Version: 1.0 From: Linus Walleij Adjust the COH 901XXX driver to use the standard enums for biasing and driving pins, alter signature of config function to suit the framework. Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-coh901xxx.c | 57 ++++++++-------------------------- 1 files changed, 14 insertions(+), 43 deletions(-) diff --git a/drivers/pinctrl/pinctrl-coh901xxx.c b/drivers/pinctrl/pinctrl-coh901xxx.c index 7f51fb8..d36b989 100644 --- a/drivers/pinctrl/pinctrl-coh901xxx.c +++ b/drivers/pinctrl/pinctrl-coh901xxx.c @@ -23,40 +23,11 @@ #include #include #include +#include #include #include "pinctrl-coh901xxx.h" /* - * Bias modes for U300 GPIOs - * - * GPIO_U300_CONFIG_BIAS_UNKNOWN: this bias mode is not known to us - * GPIO_U300_CONFIG_BIAS_FLOAT: no specific bias, the GPIO will float or state - * is not controlled by software - * GPIO_U300_CONFIG_BIAS_PULL_UP: the GPIO will be pulled up (usually with high - * impedance to VDD) - */ -#define GPIO_U300_CONFIG_BIAS_UNKNOWN 0x1000 -#define GPIO_U300_CONFIG_BIAS_FLOAT 0x1001 -#define GPIO_U300_CONFIG_BIAS_PULL_UP 0x1002 - -/* - * Drive modes for U300 GPIOs (output) - * - * GPIO_U300_CONFIG_DRIVE_PUSH_PULL: the GPIO will be driven actively high and - * low, this is the most typical case and is typically achieved with two - * active transistors on the output - * GPIO_U300_CONFIG_DRIVE_OPEN_DRAIN: the GPIO will be driven with open drain - * (open collector) which means it is usually wired with other output - * ports which are then pulled up with an external resistor - * GPIO_U300_CONFIG_DRIVE_OPEN_SOURCE: the GPIO will be driven with open drain - * (open emitter) which is the same as open drain mutatis mutandis but - * pulled to ground - */ -#define GPIO_U300_CONFIG_DRIVE_PUSH_PULL 0x2000 -#define GPIO_U300_CONFIG_DRIVE_OPEN_DRAIN 0x2001 -#define GPIO_U300_CONFIG_DRIVE_OPEN_SOURCE 0x2002 - -/* * Register definitions for COH 901 335 variant */ #define U300_335_PORT_STRIDE (0x1C) @@ -182,12 +153,12 @@ struct u300_gpio_confdata { #define BS365_GPIO_NUM_PORTS 5 #define U300_FLOATING_INPUT { \ - .bias_mode = GPIO_U300_CONFIG_BIAS_FLOAT, \ + .bias_mode = PIN_CONFIG_BIAS_HIGH_IMPEDANCE, \ .output = false, \ } #define U300_PULL_UP_INPUT { \ - .bias_mode = GPIO_U300_CONFIG_BIAS_PULL_UP, \ + .bias_mode = PIN_CONFIG_BIAS_PULL_UP, \ .output = false, \ } @@ -450,7 +421,7 @@ static int u300_gpio_to_irq(struct gpio_chip *chip, unsigned offset) } static int u300_gpio_config(struct gpio_chip *chip, unsigned offset, - u16 param, unsigned long *data) + enum pin_config_param param, unsigned long data) { struct u300_gpio *gpio = to_u300_gpio(chip); unsigned long flags; @@ -458,16 +429,16 @@ static int u300_gpio_config(struct gpio_chip *chip, unsigned offset, local_irq_save(flags); switch (param) { - case GPIO_U300_CONFIG_BIAS_UNKNOWN: - case GPIO_U300_CONFIG_BIAS_FLOAT: + case PIN_CONFIG_BIAS_DISABLE: + case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: val = readl(U300_PIN_REG(offset, per)); writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); break; - case GPIO_U300_CONFIG_BIAS_PULL_UP: + case PIN_CONFIG_BIAS_PULL_UP: val = readl(U300_PIN_REG(offset, per)); writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); break; - case GPIO_U300_CONFIG_DRIVE_PUSH_PULL: + case PIN_CONFIG_DRIVE_PUSH_PULL: val = readl(U300_PIN_REG(offset, pcr)); val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1)); @@ -475,7 +446,7 @@ static int u300_gpio_config(struct gpio_chip *chip, unsigned offset, << ((offset & 0x07) << 1)); writel(val, U300_PIN_REG(offset, pcr)); break; - case GPIO_U300_CONFIG_DRIVE_OPEN_DRAIN: + case PIN_CONFIG_DRIVE_OPEN_DRAIN: val = readl(U300_PIN_REG(offset, pcr)); val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1)); @@ -483,7 +454,7 @@ static int u300_gpio_config(struct gpio_chip *chip, unsigned offset, << ((offset & 0x07) << 1)); writel(val, U300_PIN_REG(offset, pcr)); break; - case GPIO_U300_CONFIG_DRIVE_OPEN_SOURCE: + case PIN_CONFIG_DRIVE_OPEN_SOURCE: val = readl(U300_PIN_REG(offset, pcr)); val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1)); @@ -652,12 +623,12 @@ static void __init u300_gpio_init_pin(struct u300_gpio *gpio, /* Deactivate bias mode for output */ u300_gpio_config(&gpio->chip, offset, - GPIO_U300_CONFIG_BIAS_FLOAT, - NULL); + PIN_CONFIG_BIAS_HIGH_IMPEDANCE, + 0); /* Set drive mode for output */ u300_gpio_config(&gpio->chip, offset, - GPIO_U300_CONFIG_DRIVE_PUSH_PULL, NULL); + PIN_CONFIG_DRIVE_PUSH_PULL, 0); dev_dbg(gpio->dev, "set up pin %d as output, value: %d\n", offset, conf->outval); @@ -668,7 +639,7 @@ static void __init u300_gpio_init_pin(struct u300_gpio *gpio, u300_gpio_set(&gpio->chip, offset, 0); /* Set bias mode for input */ - u300_gpio_config(&gpio->chip, offset, conf->bias_mode, NULL); + u300_gpio_config(&gpio->chip, offset, conf->bias_mode, 0); dev_dbg(gpio->dev, "set up pin %d as input, bias: %04x\n", offset, conf->bias_mode);