From patchwork Thu Nov 17 08:50:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 5177 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 5C8C923E0E for ; Thu, 17 Nov 2011 08:50:51 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id 40D7AA1876F for ; Thu, 17 Nov 2011 08:50:51 +0000 (UTC) Received: by faaa26 with SMTP id a26so4466141faa.11 for ; Thu, 17 Nov 2011 00:50:51 -0800 (PST) Received: by 10.152.144.136 with SMTP id sm8mr22725851lab.33.1321519851001; Thu, 17 Nov 2011 00:50:51 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.41.198 with SMTP id h6cs124810lal; Thu, 17 Nov 2011 00:50:50 -0800 (PST) Received: by 10.14.17.94 with SMTP id i70mr2561881eei.188.1321519848455; Thu, 17 Nov 2011 00:50:48 -0800 (PST) Received: from eu1sys200aog109.obsmtp.com (eu1sys200aog109.obsmtp.com. [207.126.144.127]) by mx.google.com with SMTP id 13si7146575eet.136.2011.11.17.00.50.40 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 17 Nov 2011 00:50:48 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.127 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.127; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.127 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob109.postini.com ([207.126.147.11]) with SMTP ID DSNKTsTK3bJ0WS7uRSwYn5GNwVyuFlbi+LcU@postini.com; Thu, 17 Nov 2011 08:50:47 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 5507512B; Thu, 17 Nov 2011 08:42:06 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 5A071DC3; Thu, 17 Nov 2011 08:50:33 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 0DF0AA8065; Thu, 17 Nov 2011 09:50:29 +0100 (CET) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.83.0; Thu, 17 Nov 2011 09:50:32 +0100 From: Linus Walleij To: , Stephen Warren Cc: Grant Likely , Barry Song <21cnbao@gmail.com>, Shawn Guo , Thomas Abraham , Dong Aisheng , Rajendra Nayak , Linus Walleij Subject: [PATCH] pinctrl: misc documentation fixups Date: Thu, 17 Nov 2011 09:50:21 +0100 Message-ID: <1321519821-25022-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.3.2 MIME-Version: 1.0 From: Linus Walleij This fixes up some various confusions in the pinctrl documentation. Reported-by: Rajendra Nayak Reported-by: Randy Dunlap Signed-off-by: Linus Walleij --- Documentation/pinctrl.txt | 30 +++++++++++++++--------------- 1 files changed, 15 insertions(+), 15 deletions(-) diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt index ea50804..348a59d 100644 --- a/Documentation/pinctrl.txt +++ b/Documentation/pinctrl.txt @@ -59,13 +59,13 @@ this in our driver: #include const struct pinctrl_pin_desc foo_pins[] = { - PINCTRL_PIN(0, "A1"), - PINCTRL_PIN(1, "A2"), - PINCTRL_PIN(2, "A3"), + PINCTRL_PIN(0, "A8"), + PINCTRL_PIN(1, "B8"), + PINCTRL_PIN(2, "C8"), ... - PINCTRL_PIN(61, "H6"), - PINCTRL_PIN(62, "H7"), - PINCTRL_PIN(63, "H8"), + PINCTRL_PIN(61, "F1"), + PINCTRL_PIN(62, "G1"), + PINCTRL_PIN(63, "H1"), }; static struct pinctrl_desc foo_desc = { @@ -90,11 +90,11 @@ selected drivers, you need to select them from your machine's Kconfig entry, since these are so tightly integrated with the machines they are used on. See for example arch/arm/mach-u300/Kconfig for an example. -Pins usually have fancier names than this. You can find these in the dataheet +Pins usually have fancier names than this. You can find these in the datasheet for your chip. Notice that the core pinctrl.h file provides a fancy macro called PINCTRL_PIN() to create the struct entries. As you can see I enumerated -the pins from 0 in the upper left corner to 63 in the lower right corner, -this enumeration was arbitrarily chosen, in practice you need to think +the pins from 0 in the upper left corner to 63 in the lower right corner. +This enumeration was arbitrarily chosen, in practice you need to think through your numbering system so that it matches the layout of registers and such things in your driver, or the code may become complicated. You must also consider matching of offsets to the GPIO ranges that may be handled by @@ -842,42 +842,42 @@ case), we define a mapping like this: .name "2bit" .ctrl_dev_name = "pinctrl.0", .function = "mmc0", - .group = "mmc0_0_grp", + .group = "mmc0_1_grp", .dev_name = "foo-mmc.0", }, { .name "4bit" .ctrl_dev_name = "pinctrl.0", .function = "mmc0", - .group = "mmc0_0_grp", + .group = "mmc0_1_grp", .dev_name = "foo-mmc.0", }, { .name "4bit" .ctrl_dev_name = "pinctrl.0", .function = "mmc0", - .group = "mmc0_1_grp", + .group = "mmc0_2_grp", .dev_name = "foo-mmc.0", }, { .name "8bit" .ctrl_dev_name = "pinctrl.0", .function = "mmc0", - .group = "mmc0_0_grp", + .group = "mmc0_1_grp", .dev_name = "foo-mmc.0", }, { .name "8bit" .ctrl_dev_name = "pinctrl.0", .function = "mmc0", - .group = "mmc0_1_grp", + .group = "mmc0_2_grp", .dev_name = "foo-mmc.0", }, { .name "8bit" .ctrl_dev_name = "pinctrl.0", .function = "mmc0", - .group = "mmc0_2_grp", + .group = "mmc0_3_grp", .dev_name = "foo-mmc.0", }, ...