From patchwork Wed Nov 16 08:59:50 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 5166 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id D756F23EF9 for ; Wed, 16 Nov 2011 09:00:20 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id BDD07A186FF for ; Wed, 16 Nov 2011 09:00:20 +0000 (UTC) Received: by faaa26 with SMTP id a26so1753493faa.11 for ; Wed, 16 Nov 2011 01:00:20 -0800 (PST) Received: by 10.152.135.166 with SMTP id pt6mr19718838lab.26.1321434020513; Wed, 16 Nov 2011 01:00:20 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.41.198 with SMTP id h6cs74666lal; Wed, 16 Nov 2011 01:00:17 -0800 (PST) Received: by 10.213.26.74 with SMTP id d10mr176356ebc.39.1321434014526; Wed, 16 Nov 2011 01:00:14 -0800 (PST) Received: from eu1sys200aog118.obsmtp.com (eu1sys200aog118.obsmtp.com. [207.126.144.145]) by mx.google.com with SMTP id q59si6229891eea.75.2011.11.16.00.59.59 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 16 Nov 2011 01:00:14 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.145 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.145; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.145 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-us.st.com ([167.4.1.35]) (using TLSv1) by eu1sys200aob118.postini.com ([207.126.147.11]) with SMTP ID DSNKTsN7joehX627PO/UdoRW5+U0yZwkJB5O@postini.com; Wed, 16 Nov 2011 09:00:14 UTC Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id E1BBC61; Wed, 16 Nov 2011 08:59:56 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id 693CA7A; Wed, 16 Nov 2011 08:53:48 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 3144124C07C; Wed, 16 Nov 2011 09:59:51 +0100 (CET) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Wed, 16 Nov 2011 09:59:55 +0100 From: Linus Walleij To: , Stephen Warren Cc: Grant Likely , Barry Song <21cnbao@gmail.com>, Shawn Guo , Thomas Abraham , Dong Aisheng , Rajendra Nayak , Linus Walleij Subject: [PATCH] pinctrl: print pin range in GPIO range debugs Date: Wed, 16 Nov 2011 09:59:50 +0100 Message-ID: <1321433990-17403-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.3.2 MIME-Version: 1.0 From: Linus Walleij Show the mapped pin range corresponding to the GPIO range in debugfs for pin controllers. Signed-off-by: Linus Walleij --- drivers/pinctrl/core.c | 7 +++++-- 1 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index a1a679c..4598fc5 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -402,8 +402,11 @@ static int pinctrl_gpioranges_show(struct seq_file *s, void *what) /* Loop over the ranges */ mutex_lock(&pctldev->gpio_ranges_lock); list_for_each_entry(range, &pctldev->gpio_ranges, node) { - seq_printf(s, "%u: %s [%u - %u]\n", range->id, range->name, - range->base, (range->base + range->npins - 1)); + seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", + range->id, range->name, + range->base, (range->base + range->npins - 1), + range->pin_base, + (range->pin_base + range->npins - 1)); } mutex_unlock(&pctldev->gpio_ranges_lock);