From patchwork Thu Nov 21 05:01:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 179895 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp3085790ilf; Wed, 20 Nov 2019 21:02:25 -0800 (PST) X-Google-Smtp-Source: APXvYqz2Q0SluazDF4n+U9zmXTQxnDSeW7leMuyKEh5+eEpWb/T9duzMYqETya9DXY4AprG5bqAD X-Received: by 2002:a17:906:22c9:: with SMTP id q9mr10701378eja.198.1574312545305; Wed, 20 Nov 2019 21:02:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574312545; cv=none; d=google.com; s=arc-20160816; b=YhXcn9T2JGtsflqcrReelGTACCQvvEMq8T8RsRixRUwso3sLkA384j+HjDfgZYHdup hw5PNbm7CQYr8cSeZgVMr5DksbIzJSThJsHpyhsnMpyYKDf8okes4843Hc1jjRI9q9KK 9CM9QwGyYaU3JUy8qWMG5mnwndZc7xIkZjr5hYzhPRXpFBu9SVqNx2/hoDGbrytjJ4Ai L0GEVoY9Un5fN8UnZilHYdIPkZFAwnpf+ltEaSMwjHlIJPdu/nrqFGj9AlQn+LlRDL0/ 3dlrr54f6iYKr4F2BuEx5U6Qfg7R7YM7I1NKs8LwqwSrmulKgXCF6lcSisVH30mkKJQH ta2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=fTDUwltD+7qf6NUI3csi7+1HgNwztCTHUcxDEPAqeaI=; b=i/db3sycjLQVtupmDkC/iaq/lulpCVQ3lNpCQ1IjAqTo89S8/H9rFfYtH/rkjFPhOi ZaDiiz5IxRYIfTYqg/Ff/j8XqoDRYx/YIA07mfYnVGywKKWW86E3Ua8WQqJofp/aJ4DL mC1QYVwPY/lPF15u/IjfgrTqBNSDwFEw4l2u/SLfH2/FXbTZhulmaUtbaKofaABK4S3d h1SHAsK0segefBKHbY5rM9XhDgvGIvvUIuudjTvCy26iDkZCZ/AfFWCC1Kq7uJad6EYZ kgRdCDSC0ToqV3dQnh6E3ZB/gZzaQvoY1X4eRZLVF0gcmuyg8KooBu8y0Mq+8lREoqzA Hyeg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c19si1181088edt.387.2019.11.20.21.02.25; Wed, 20 Nov 2019 21:02:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726690AbfKUFCY (ORCPT + 26 others); Thu, 21 Nov 2019 00:02:24 -0500 Received: from mx2.suse.de ([195.135.220.15]:36382 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725854AbfKUFCV (ORCPT ); Thu, 21 Nov 2019 00:02:21 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id F1DE8AFF4; Thu, 21 Nov 2019 05:02:18 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Thomas Gleixner , Jason Cooper , Marc Zyngier , devicetree@vger.kernel.org, Andrew Lunn , Aleix Roca Nonell , James Tai Subject: [PATCH v5 0/9] ARM: Realtek RTD1195/RTD1295/RTD1395 IRQ mux Date: Thu, 21 Nov 2019 06:01:59 +0100 Message-Id: <20191121050208.11324-1-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, This series adds two IRQ muxes for the Realtek RTD1195, RTD1295 and RTD1395 SoC families. The implementation is based on register offsets seen in the vendor DT, split up into two separate nodes, as well as code from QNAP's rtk119x and Synology's RTD1293/96 GPL code dumps and Banana Bi W2/M4 BSP repositories. v5 cleans up mask/unmask, ack and naming. >From /proc/interrupts on RTD1195: 24: 158 iso 2 Edge ttyS0 >From /proc/interrupts on RTD1395: 9: 110 0 0 0 iso 2 Edge ttyS0 The chip name now no longer overflows the columns, but irq type is still wrong. @Realtek: Patch 8/9 contains a question about RTD1395. More experimental patches at: https://github.com/afaerber/linux/commits/rtd1295-next Have a lot of fun! Cheers, Andreas v4 -> v5: * Renamed enable/disable to unmask/mask (Marc) * Factored out ack (Marc) * Clear all interrupts * Mapped RTD1195 WDOG_NMI * Added and mapped RTD1295 WDOG_NMI * Suppress mapping NMIs and reserved bits (Marc) * Drop mask checks in mask/unmask (Marc) * Drop mask check in interrupt handler * Renamed RTD1295 misc bits with MIS_ for consistency * Renamed RTD1395 misc bits from MISC_ to MIS_ for consistency * Renamed irq_chip to distinguish iso vs. misc * Implemented .irq_get_irqchip_state v3 -> v4: * Drop no-op .irq_set_affinity callback (Thomas) * Disable all interrupts (James) * Updated SPDX-License-identifier * Use tabular formatting (Thomas) * Adopt different braces style (Thomas) * Use raw_spinlock_t (Thomas) * Shortened callback name (Thomas) * Fixed of_iomap() error handling * Don't mask unmapped NMIs * Cache SCPU_INT_EN (Thomas) * Renamed binding and source files * Dropped UART1/UART2 TO interrupts * Expanded commit messages * Added RTD1395 patches v2 -> v3: * Rebased, adding nodes to rtd129x.dtsi instead of rtd1295.dtsi * Adopted {readl,writel}_relaxed() (Marc) * Adopted spin_lock_irqsave() (Marc) * Implemented RTD1195 * Implemented mapping for non-linear bits such as i2c3 v1 -> v2: * Rebased, avoiding dependency on reset series for DT nodes * Don't forward set_affinity to GIC (Marc) * Added more spinlocks (Marc) * Code cleanups * Investigated quirk * Fixed spinlock initialization (Andrew) Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier Cc: devicetree@vger.kernel.org Cc: Andrew Lunn Cc: Aleix Roca Nonell Cc: James Tai Andreas Färber (9): dt-bindings: interrupt-controller: Add Realtek RTD1195/RTD1295 mux irqchip: Add Realtek RTD1295 mux driver irqchip: rtd1195-mux: Implement irq_get_irqchip_state arm64: dts: realtek: rtd129x: Add irq muxes and UART interrupts irqchip: rtd1195-mux: Add RTD1195 definitions ARM: dts: rtd1195: Add irq muxes and UART interrupts dt-bindings: interrupt-controller: rtd1195-mux: Add RTD1395 irqchip: rtd1195-mux: Add RTD1395 definitions arm64: dts: realtek: rtd139x: Add irq muxes and UART interrupts .../interrupt-controller/realtek,rtd1195-mux.yaml | 55 +++ arch/arm/boot/dts/rtd1195.dtsi | 20 + arch/arm64/boot/dts/realtek/rtd129x.dtsi | 22 + arch/arm64/boot/dts/realtek/rtd139x.dtsi | 22 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-rtd1195-mux.c | 512 +++++++++++++++++++++ 6 files changed, 632 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml create mode 100644 drivers/irqchip/irq-rtd1195-mux.c -- 2.16.4