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[83.35.113.69]) by smtp.gmail.com with ESMTPSA id p23sm137599wma.18.2019.09.12.07.15.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 12 Sep 2019 07:15:39 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org, agross@kernel.org, mturquette@baylibre.com, bjorn.andersson@linaro.org Cc: niklas.cassel@linaro.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/5] Clock changes to support cpufreq on QCS404 Date: Thu, 12 Sep 2019 16:15:29 +0200 Message-Id: <20190912141534.28870-1-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.23.0 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following clock changes are required to enable cpufreq support on the QCS404 v2: sboyd review of v1 ------------------- missing cover letter reorder the patchset use clk_parent data to speficy the parent clock dong ignore the clock position abi Jorge Ramirez-Ortiz (5): clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency clk: qcom: hfpll: register as clock provider clk: qcom: hfpll: CLK_IGNORE_UNUSED clk: qcom: hfpll: use clk_parent_data to specify the parent clk: qcom: apcs-msm8916: get parent clock names from DT drivers/clk/qcom/apcs-msm8916.c | 15 ++++++++++++--- drivers/clk/qcom/clk-alpha-pll.c | 8 ++++++++ drivers/clk/qcom/clk-alpha-pll.h | 1 + drivers/clk/qcom/gcc-qcs404.c | 2 +- drivers/clk/qcom/hfpll.c | 21 +++++++++++++++++++-- 5 files changed, 41 insertions(+), 6 deletions(-) -- 2.23.0