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[v2,0/3] coresight: Add barrier packet when moving offset forward

Message ID 20190826194605.3791-1-mathieu.poirier@linaro.org
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Series coresight: Add barrier packet when moving offset forward | expand

Message

Mathieu Poirier Aug. 26, 2019, 7:46 p.m. UTC 
This set builds on top of an original patch by Yabin Cui[1] that deals with
cases where the ETR buffer it bigger than the space available in the perf
ring buffer.  The work herein complements Yabin's by inserting barrier
packets after the head of the memory buffer has been moved forward in order
for the trace decoder to still synchronise with the trace stream.  

Applies cleanly to the coresight next branch.

Thanks,
Mathieu

[1]. https://lkml.org/lkml/2019/8/14/1336

New to V2:
- Added Yabin's Tested-by.
- Addressed Leo's comment about extending the solution to the sysfs
  interface.
- Split the work in 3 patches rather than 2.

Mathieu Poirier (3):
  coresight: tmc: Make memory width mask computation into a function
  coresight: tmc-etr: Decouple buffer sync and barrier packet insertion
  coresight: tmc-etr: Add barrier packets when moving offset forward

 .../hwtracing/coresight/coresight-tmc-etf.c   | 23 +--------
 .../hwtracing/coresight/coresight-tmc-etr.c   | 47 ++++++++++++++-----
 drivers/hwtracing/coresight/coresight-tmc.c   | 28 +++++++++++
 drivers/hwtracing/coresight/coresight-tmc.h   |  1 +
 4 files changed, 67 insertions(+), 32 deletions(-)

-- 
2.17.1