From patchwork Mon Aug 19 13:01:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 171617 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp2946975ily; Mon, 19 Aug 2019 06:02:01 -0700 (PDT) X-Google-Smtp-Source: APXvYqyvNDWcaIEtPo1S+KwyJ0gwHFs0UkV4M52TFRhAPqDGP05FhN/QsA0XTEVuQxZ7tViH5kNC X-Received: by 2002:a17:90a:1ae1:: with SMTP id p88mr19816299pjp.26.1566219721264; Mon, 19 Aug 2019 06:02:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566219721; cv=none; d=google.com; s=arc-20160816; b=IFKTUoHfpXlYd/YlWWHgXqJGALfTgd0Gp2GuOm4PTUpkZs5lwMj6mciJsZK8Nlf7K2 k3iP3on4Q4kq1l8UpswJfc9tf7XRJ7Hny3LfeCBRTDAZ9tahKdMQA+AylqZOXgv+Xijz lka9WEYUTE2qDkJHGqcatpZsLdQlVnfnu3kdomkMbHDbAw7Ls6qkgDYgd92wTsSw9LO0 dDejOL8KRfzMNJ0enYjJtr/+Ick0MuGpgxDijfx5zNG5l9NRd7tiURrvZNLZ5DotBb0S If/81BW62BLO9N+stmfvT2ch8OdlxaNxG+QqACLEi/HtEAfCJVXQjkzuFz8YtFysEttF h7Tg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature; bh=ro8NKFkgruYUmO3tKNMvPEE1StisH9qvZFC7x6V6Dyo=; b=ZzZPJ4UJi0cEDaL+IsZnjcOAtOfA8iib2DxUe2TtnmXPrRtFj+bU3GaSc6oPiSsoMR 2CflSaRJq2T7M81C/hZgwY1jMPSV7HfOhxu+hLTf+LjppFfpgbk2v1jockjZMWzYQRcw 5OqpwIXfD3Kbe7L0ajMYlYq65P9Ylug3rLPMCoF/U0tT5fN0Nw+TTHTMNqv6z5m7jnLC QzukWQSSCY3xdtH1W30Hk1b2JbscG8edMu35KPqrdtBxSTEhaIyE8eP8fNWDvRUz2z+w gsOQiRouhTgzVxTLDutYwLm8smu10eGyxTBpjWNqTA95kJJpDGiFjy4u6eFVLrXcsWT5 KQ9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uhcA35N5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o6si10667320pfb.230.2019.08.19.06.02.00; Mon, 19 Aug 2019 06:02:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uhcA35N5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727653AbfHSNB7 (ORCPT + 28 others); Mon, 19 Aug 2019 09:01:59 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:46168 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727308AbfHSNB7 (ORCPT ); Mon, 19 Aug 2019 09:01:59 -0400 Received: by mail-pg1-f196.google.com with SMTP id m3so1178364pgv.13 for ; Mon, 19 Aug 2019 06:01:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=ro8NKFkgruYUmO3tKNMvPEE1StisH9qvZFC7x6V6Dyo=; b=uhcA35N59KiYak0FvJjaWA0JqdakHYRgV6udX5bKaVu2FDZ/jyGdZf/xD07iEIzxPr Rek11IDX2I/K530tekaf8eUX26/KRrB2BxoSdpym84viDhBcmw5C7LwHhPGOLRLypYhZ mHOzkzjnk4RLJh1pJa4wDOaY/8kK6XMfeTzN0ymvzEsIkCj0GqCr+36J6S4izQ/qeB3g +H08Pv2/SBzDAJccPaJ7St511RS7JB1ZuPmjhHSy4BQUswfxndPWftka8HBiVjmUwq2k yzIL21ejhxM+sU0E6ss7bxhu7BGfcS3U2O6os7QSuIN2nCJsU6FdDWCZgmkkWP/WqSvE 9tMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ro8NKFkgruYUmO3tKNMvPEE1StisH9qvZFC7x6V6Dyo=; b=DkqQkOmt2yac9813fidfYmGfNTi+ihkdBjj9pFqHWb07EE4Me295CDrDBKVZh76QZF 6PiFO2TMm/6exKfRo/meh0hM6yRGp/LywgGl3LOnzoMxm6h5smOF4g00AT9mKNJH8rom LjIwrwLw0hvvo8qO4xi8KOT0mes+58AomwELsKfgZ5zLBLAPRQ78PkqINXMLu6S7M6jt d0nIkAKMcE3MjIePElNTBpHXC2XbCIl/YLQxNQKtXjSL7OXA8gsyL4ns7wT62LLoKI2i OqBy1IIWr77XhY+UnBrNqS5FPyj1HYKEEZrE+ZWBKPFT6tVzHlcuWvQkPRU5DQjbYnmT Bhtg== X-Gm-Message-State: APjAAAVPfmyCoWvHLivSvcxLSV77cDzFIzqdxB0Yj2ruv5zqQj7lePfW 3pfa6nWUnNIPVTzkXdpZyLPJ X-Received: by 2002:a63:5b52:: with SMTP id l18mr19716563pgm.21.1566219718474; Mon, 19 Aug 2019 06:01:58 -0700 (PDT) Received: from localhost.localdomain ([103.59.133.81]) by smtp.googlemail.com with ESMTPSA id l123sm20626464pfl.9.2019.08.19.06.01.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Aug 2019 06:01:57 -0700 (PDT) From: Manivannan Sadhasivam To: sboyd@kernel.org, mturquette@baylibre.com, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, haitao.suo@bitmain.com, darren.tsao@bitmain.com, fisher.cheng@bitmain.com, alec.lin@bitmain.com, Manivannan Sadhasivam Subject: [PATCH v3 0/8] Add Bitmain BM1880 clock driver Date: Mon, 19 Aug 2019 18:31:35 +0530 Message-Id: <20190819130143.18778-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, This patchset adds common clock driver for Bitmain BM1880 SoC clock controller. The clock controller consists of gate, divider, mux and pll clocks with different compositions. Hence, the driver uses composite clock structure in place where multiple clocking units are combined together. This patchset also removes UART fixed clock and sources clocks from clock controller for Sophon Edge board where the driver has been validated. Thanks, Mani Changes in v3: * Switched to clk_hw_{register/unregister} APIs * Returned clk_hw from the in-driver registration helpers Changes in v2: * Converted the dt binding to YAML * Incorporated review comments from Stephen (majority of change is switching to new way of specifying clk parents) Manivannan Sadhasivam (8): clk: Zero init clk_init_data in helpers clk: Warn if clk_init_data is not zero initialized clk: Add clk_hw_unregister_composite helper function definition dt-bindings: clock: Add devicetree binding for BM1880 SoC arm64: dts: bitmain: Add clock controller support for BM1880 SoC arm64: dts: bitmain: Source common clock for UART controllers clk: Add common clock driver for BM1880 SoC MAINTAINERS: Add entry for BM1880 SoC clock driver .../bindings/clock/bitmain,bm1880-clk.yaml | 83 ++ MAINTAINERS | 2 + .../boot/dts/bitmain/bm1880-sophon-edge.dts | 9 - arch/arm64/boot/dts/bitmain/bm1880.dtsi | 28 + drivers/clk/Kconfig | 6 + drivers/clk/Makefile | 1 + drivers/clk/clk-bm1880.c | 966 ++++++++++++++++++ drivers/clk/clk-composite.c | 13 +- drivers/clk/clk-divider.c | 2 +- drivers/clk/clk-fixed-rate.c | 2 +- drivers/clk/clk-gate.c | 2 +- drivers/clk/clk-mux.c | 2 +- drivers/clk/clk.c | 8 + include/dt-bindings/clock/bm1880-clock.h | 82 ++ 14 files changed, 1192 insertions(+), 14 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/bitmain,bm1880-clk.yaml create mode 100644 drivers/clk/clk-bm1880.c create mode 100644 include/dt-bindings/clock/bm1880-clock.h -- 2.17.1