From patchwork Wed Feb 13 13:26:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 158218 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp71425jaa; Wed, 13 Feb 2019 05:27:41 -0800 (PST) X-Google-Smtp-Source: AHgI3IZ7TPJVTx+vwgl0moQKdpUHDEKk3O6/xzTmQCkLriKvGdcdQ1U8VpOOxbp4DbJsSCnFlmgp X-Received: by 2002:aa7:8101:: with SMTP id b1mr554281pfi.148.1550064461624; Wed, 13 Feb 2019 05:27:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550064461; cv=none; d=google.com; s=arc-20160816; b=C2Cn1US82YHaFIV4emdAB8itmudXU+4zLJERb+M1GuI+AHnZykYujGnr0vsaWbU5Iv xxVbEmEozJ1dc8FHQLz03pLuRdZOGB6g9xyXOhIJriAoNa8RxcKgmeDWIsizEgE6tRi3 8j5fDWFfhjPcv9oq2Yv5HOL0gDNqiBYMdEHXVzT5HBVBk3ul4SN+5IIwk9n+/7e1FVmL Ux+xRwUXjbUiG5VvH94WxMAU82MJ/D01a3ZDEvWN5Zw6mR76WK3csnGyi6Fxfr3uKsCs hUh3miZ1j/r+4pjPxJVieB0HLW/yVPBtM2ZLFrn/Z9N4WjlAE/q6/hvONjyVlKpr1NiL J9cw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:dkim-signature; bh=fpgsPlTd0MGIi9eb4eHXa6+c5sBCnM1OOhd5UQLAeuc=; b=j+SNM9qwkgGLXhcKnEZEUOFq6qQhoiY/arsfni3+hbypfyOc1e22pOsE5k9Nbmz60r sfrEP3FLs208T9S8gQ9k8noAEfu2gDkBrQ4WupcWbQx+jTPujfSLzmKInFmD+Lgv95Ij o+uokBGRfi2j4fdrEDRV3tWPjgu10fQghLUlEXzebvVQlplu11qeIcwjc9hriRBX+WGT Zo89GJoowlP/mZCdn1AEOwd2O9k6ORcjM+zuetcQ8xE5w06uHnV1+Xw3q/2v5SjEaalk UzAjiSvL0xmtzVhlsR+sBa+SRsGG4q7nCpNvU3axNnhhFvibw55b/kKkUKgwD+t04eCy ccJQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=c3YUw8zj; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c136si2387779pfc.141.2019.02.13.05.27.41; Wed, 13 Feb 2019 05:27:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=c3YUw8zj; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390831AbfBMN1k (ORCPT + 31 others); Wed, 13 Feb 2019 08:27:40 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:38426 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730839AbfBMN1j (ORCPT ); Wed, 13 Feb 2019 08:27:39 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x1DDRKAT071559; Wed, 13 Feb 2019 07:27:20 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1550064440; bh=fpgsPlTd0MGIi9eb4eHXa6+c5sBCnM1OOhd5UQLAeuc=; h=From:To:CC:Subject:Date; b=c3YUw8zjUCr8TdGL9VlS0Om0uA9JfCSBQ3DY+aJpFykPUuWjwdwizii3co+7jKp/W j4Lbzg4sMX5irJURiwGlMO+SEwsbpe3mnFFGFgJ+abnOQ1PynV2oGgpRYiLE5ZUoBc 7XzbwUNaSrYtLwjPpAkcJLJb9Lqs9e2DS+xqY728= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x1DDRKoO117358 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Feb 2019 07:27:20 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Wed, 13 Feb 2019 07:27:19 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Wed, 13 Feb 2019 07:27:19 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1DDRGZa016688; Wed, 13 Feb 2019 07:27:17 -0600 From: Kishon Vijay Abraham I To: Murali Karicheri , Lorenzo Pieralisi CC: Kishon Vijay Abraham I , Bjorn Helgaas , Jingoo Han , Gustavo Pimentel , , , Subject: [PATCH v3 0/9] PCI: DWC/Keystone: MSI configuration cleanup Date: Wed, 13 Feb 2019 18:56:20 +0530 Message-ID: <20190213132629.24790-1-kishon@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series tries to address the comments discussed in [1] w.r.t removing Keystone specific callbacks defined in dw_pcie_host_ops. This series also tries to cleanup the Keystone interrupt handling part. Changes from v2: *) Removed patch that modifies ks_pcie_legacy_irq_handler() to check the IRQ_STATUS of INTA/B/C/D. Lorenzo's comment to create a matrix LinuxIRQ x INTx will be added in AM654x PCIe support series *) ks_pcie_legacy_irq_handler() is made to use hwirq to get IRQ offset instead of virq. *) default msi_irq_chip is assigned in dw_pcie_host_init() once keystone assigns its msi_irq_chip *) Fixed other minor comments from Lorenzo and Bjorn Changes from v1: *) Removed "PCI: keystone: Use "dummy_irq_chip" instead of new irqchip for legacy interrupt handling" from the patch series. It should be handled differently. *) Added Gustavo's ACKed by and fixed a commit message. [1] -> https://patchwork.kernel.org/patch/10681587/ Kishon Vijay Abraham I (9): PCI: keystone: Cleanup interrupt related macros PCI: keystone: Add separate functions for configuring MSI and legacy interrupt PCI: keystone: Use hwirq to get the legacy IRQ number offset PCI: keystone: Use hwirq to get the MSI IRQ number offset PCI: keystone: Cleanup ks_pcie_msi_irq_handler and ks_pcie_legacy_irq_handler PCI: dwc: Add support to use non default msi_irq_chip PCI: keystone: Use Keystone specific msi_irq_chip PCI: dwc: Remove Keystone specific dw_pcie_host_ops PCI: dwc: Do not write to MSI control registers if the platform doesn't use it drivers/pci/controller/dwc/pci-keystone.c | 412 ++++++++++-------- .../pci/controller/dwc/pcie-designware-host.c | 78 ++-- drivers/pci/controller/dwc/pcie-designware.h | 6 +- 3 files changed, 259 insertions(+), 237 deletions(-) -- 2.17.1