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[v2,00/10] Add Actions Semi S900 pinctrl and gpio support

Message ID 20180221160044.15089-1-manivannan.sadhasivam@linaro.org
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Series Add Actions Semi S900 pinctrl and gpio support | expand

Message

Manivannan Sadhasivam Feb. 21, 2018, 4 p.m. UTC 
This patchset adds pinctrl and gpio support for Actions Semi S900 SoC.
Pinctrl and gpio subsystems share the common set of register range but
implemented as individual drivers for making it less complex.

Pinmux functions are only accessible for pin groups while pinconf
parameters are available for both pin groups and individual pins.

gpio-line-names has been added for the Bubblegum-96 board matching the
96Boards CE specification v1.0.

Both pinctrl and gpio drivers are verified using the Bubblegum-96 board.

This patchset depends on the clock driver which is still under review:
https://lkml.org/lkml/2018/2/9/831

There is also S500 pinctrl and gpio driver developed by Andreas Farber
independently to this patchset.
https://github.com/afaerber/linux/commits/bg96-next

If this patchseries seems to be good enough to add base OWL pinctrl and
gpio support. Then, we may decide on adding S500 support on top of this later
by reusing the pinctrl definitions from Andreas.

Thanks,
Mani

Changes in v2:

* Implemented each GPIO bank as its own gpio-controller
* Added gpio-ranges property
* Modified pin group to follow pad names instead of register names
* Incorporated review comments from Andy
* Incorporated review comments from Andreas
* Fixed the MODULE_LICENSE with respect to SPDX tag
* Added Reviewed by tag from Rob for pinctrl binding

Manivannan Sadhasivam (10):
  dt-bindings: pinctrl: Add bindings for Actions S900 SoC
  arm64: dts: actions: Add pinctrl node for S900
  arm64: actions: Enable PINCTRL in platforms Kconfig
  pinctrl: actions: Add Actions S900 pinctrl driver
  dt-bindings: gpio: Add gpio nodes for Actions S900 SoC
  arm64: dts: actions: Add S900 gpio nodes
  arm64: dts: actions: Add gpio line names to Bubblegum-96 board
  gpio: Add gpio driver for Actions OWL S900 SoC
  MAINTAINERS: Add reviewer for ACTIONS platforms
  MAINTAINERS: Add Actions Semi S900 pinctrl and gpio entries

 .../devicetree/bindings/gpio/actions,owl-gpio.txt  |   76 +
 .../bindings/pinctrl/actions,s900-pinctrl.txt      |  178 ++
 MAINTAINERS                                        |    5 +
 arch/arm64/Kconfig.platforms                       |    1 +
 arch/arm64/boot/dts/actions/s900-bubblegum-96.dts  |  201 ++
 arch/arm64/boot/dts/actions/s900.dtsi              |   54 +
 drivers/gpio/Kconfig                               |    8 +
 drivers/gpio/Makefile                              |    1 +
 drivers/gpio/gpio-owl.c                            |  219 ++
 drivers/pinctrl/Kconfig                            |    1 +
 drivers/pinctrl/Makefile                           |    1 +
 drivers/pinctrl/actions/Kconfig                    |   12 +
 drivers/pinctrl/actions/Makefile                   |    2 +
 drivers/pinctrl/actions/pinctrl-owl.c              |  571 +++++
 drivers/pinctrl/actions/pinctrl-owl.h              |  178 ++
 drivers/pinctrl/actions/pinctrl-s900.c             | 2505 ++++++++++++++++++++
 16 files changed, 4013 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
 create mode 100644 Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt
 create mode 100644 drivers/gpio/gpio-owl.c
 create mode 100644 drivers/pinctrl/actions/Kconfig
 create mode 100644 drivers/pinctrl/actions/Makefile
 create mode 100644 drivers/pinctrl/actions/pinctrl-owl.c
 create mode 100644 drivers/pinctrl/actions/pinctrl-owl.h
 create mode 100644 drivers/pinctrl/actions/pinctrl-s900.c

-- 
2.14.1

Comments

Andreas Färber Feb. 21, 2018, 10:38 p.m. UTC | #1 
Am 21.02.2018 um 20:13 schrieb Andy Shevchenko:
> On Wed, Feb 21, 2018 at 6:00 PM, Manivannan Sadhasivam

> <manivannan.sadhasivam@linaro.org> wrote:

>> Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers

>> controlling the gpio shares the same register range with pinctrl block.

>>

>> GPIO registers are organized as 6 banks and each bank controls the

>> maximum of 32 gpios.

> 

>> +static void owl_gpio_set_reg(void __iomem *base, unsigned int pin, int flag)

>> +{

>> +       u32 val;

>> +

>> +       if (flag) {

>> +               val = readl(base);

>> +               val |= BIT(pin);

>> +               writel(val, base);

>> +       } else {

>> +               val = readl(base);

>> +               val &= ~BIT(pin);

>> +               writel(val, base);

>> +       }

>> +}

> 

> Why not to use the same pattern as below?

> 

> readl()

> if ()

>  ...

> else

> ...

> writel()

> 

> ?


And shouldn't that be readl_relaxed() and writel_relaxed()?

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
Linus Walleij Feb. 23, 2018, 3:07 p.m. UTC | #2 
On Wed, Feb 21, 2018 at 5:00 PM, Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:

> Add pinctrl driver for Actions Semi S900 SoC. The driver supports

> pinctrl, pinmux and pinconf functionalities through a range of registers

> common to both gpio driver and pinctrl driver.

>

> Pinmux functionality is available only for the pin groups while the

> pinconf functionality is available for both pin groups and individual

> pins.

>

> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>


Looks very good overall.

Can I get Andreas' feedback and ACK on this?

It would be awesome if someone from Actions could also
ACK or drop some comments.

Actions was an early adopter of the pin control framework (it was
used already on ATM7029), so I would appreciate their feedback.

Yours,
Linus Walleij