From patchwork Wed Jan 31 18:09:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 126385 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp967969ljc; Wed, 31 Jan 2018 10:09:56 -0800 (PST) X-Google-Smtp-Source: AH8x225HNWGjGnU3JrmxXGEFuxojxGollPMqr+ba7VCcHJwn55FmX71UmEcizvHnDrbCUE6kIytd X-Received: by 10.98.112.4 with SMTP id l4mr34146816pfc.8.1517422196176; Wed, 31 Jan 2018 10:09:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517422196; cv=none; d=google.com; s=arc-20160816; b=C2hpeJOpG/wS/QegaMECkHOsxHV2KtIthPdEE2Ha/RWOQ0k9i+eHAh2FCm8T7IUM0s x7n8UThmxpWBCQWJWIqSCzIufgBb+LClwOUizFESq784APuQDcfqoJ6ekXQWSLkZWDKm GcSIzVRJgLoxH7rMHyE1DuzyV0IKrCxOvHn23Wt7DbE9+ZkL/3E4Rb+V3W+Pf6FiORYC nIDqNrYFglr6LY62SLtqh/AGZs82saxxSUBE/4SgGePwiNULulfjKBKELOwIDT1+gb4p lXPMqajS+I/OlzvTdEVMnbtlLUHRbltUrscCE8737nX9pB/Uonsc4h92nidizYQCn9Ff 0z4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=7oj8YI1IplQ4ARWW8FS4dYgOtC7yhSvLGdZgr4l5Ehc=; b=bG/P964lUgft1sL5pt3cArUz4/J57AGRiGFAmRcMtTRhdgSodgHhbkXLHhs+Fx+dyo QUIhIdJ4/IzzbJYhGpzT2qa2+rR98tRDpiHzzrNdN0z3tHoFGAIC5pkzXGbzhmuKhaYv LcpMWS0NytiDJGCDScOqOpd/Z07Rc4WsFqLl6lnm57Kq2oHlcub7KrHZsP6e1iGrra7V kUTy+zWEsOyMRB3DLBoWLPaMVsr9dawzvAFBYMTwpn8EQ8eb0pp0oh9Att6pbTsELOx3 X10iNJ7+DHr8CAJu9I5odVic6UqkY7Wf9o0Am9PyT0VV07BWnEdspZwALDVaHVkVx08Q 4Sgg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=X4Aa+iHF; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z72si2476867pff.100.2018.01.31.10.09.55; Wed, 31 Jan 2018 10:09:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=X4Aa+iHF; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753604AbeAaSJx (ORCPT + 28 others); Wed, 31 Jan 2018 13:09:53 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:40045 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753085AbeAaSJv (ORCPT ); Wed, 31 Jan 2018 13:09:51 -0500 Received: by mail-wm0-f65.google.com with SMTP id v123so769421wmd.5 for ; Wed, 31 Jan 2018 10:09:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=7oj8YI1IplQ4ARWW8FS4dYgOtC7yhSvLGdZgr4l5Ehc=; b=X4Aa+iHF0Fx18XrERS0/+x+yyN//p2xijFWV9dbOmvBmVLGNz9CNI6/59ezlUYPbye leSFco7bo/bGSuAIWf8RPh2dNjdXnj/I+q2k8SDtuPYyZoTdOQN2Sg5sjzjGx6sA5RM5 Qh2Km1jy2Os/4MiJ7WobdiDMRKOdxavodeCNoafRWlawMkbhSW1ywwFjBMysUHeXEqPK HtyBy/Hr1/EOHu3MK/k4aNMZIsY3H0w1kMYPZwTDGosk91ygmIqHRrfpy9Vi9tQY6PEZ CcFbVhLQjROf8kILQgOy6RW5UCeQmouD8TLvPayTBd+eRdxxEQQmo+FSunh4j+c3rpsB /yyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=7oj8YI1IplQ4ARWW8FS4dYgOtC7yhSvLGdZgr4l5Ehc=; b=J9jy4D9ui7QhF55tHBe467+t/DH7fKRD+cySqw1FAH7G/uHQCRlMG/Ieoh/QItVRHh SLoWX+SRGU2mdCFAQr9wnudvrRhRvlXys/gzLiEMes6vER0128wnZcsRiFd+0Q3A9M/e hP38NFHg25tVtZKzdC/dy5KPDa9CWKjxv/QbCX9h51uyxMnCxYaRZ/P/7cu9q1IQVt14 i6Amhv9ND+v+6nLIIWE3HA/KMluHd62wypdg9UzKkZKxlrOt7mcqWZaNrNO1NdSQgkeK 7HflFKdAaVfG4ydYnHvf02RyQO+UG1U2KQewPteAXAx+zUX1tm10bHxfrQruW4FVOWMa K+ig== X-Gm-Message-State: AKwxyteLYRdho6NFxUilfcEtqNaEO96k+9SeY5mUha2vlTkGj4Z48cVx 42dQU0e36Zg1eAGSZM6MYPZ7pg== X-Received: by 10.28.141.212 with SMTP id p203mr16146826wmd.39.1517422189578; Wed, 31 Jan 2018 10:09:49 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id f8sm341977wmc.3.2018.01.31.10.09.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 31 Jan 2018 10:09:49 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Kevin Hilman Cc: Jerome Brunet , Stephen Boyd , Michael Turquette , Carlo Caione , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 00/19] clk: meson: use regmap in clock controllers Date: Wed, 31 Jan 2018 19:09:26 +0100 Message-Id: <20180131180945.18025-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This changeset is a rework of meson's clock controllers to use regmap instead of directly using io memory. It based clk-meson next/drivers and depends on few core clock patches, mainly to export generic clocks helpers: [0],[1]. The line count is pretty high but the changes are actually fairly simple and repetitive. This work has been triggered by the fact that the HHI register space on gxbb and axg provides more than just clocks. The display driver already uses a syscon for HHI on gxbb. This is why gxbb did not use devm_ioremap_resource() to map the registers, since it would have reserved the memory region, preventing another driver from re-mapping it. The cleaner solution is, of course, to use syscon to handle. The purpose of this changeset is to allow it. Even if meson8b does not need this ATM, there is real reason to leave it behind. It is actually easier to migrate it as well, so all meson clock drivers may support regmap only. The rework starts with a few easy clean-ups. The real deal starts with patch 5, which adds meson's clk_regmap. This will be used as common structure to implement all the controller clocks. Having this replaces the gxbb AO controller specific regmap gate. This structure will also be re-used in upcoming controllers, such as the axg's AO and audio controllers. Each clock type is then migrated, one at a time, to this new structure. While at it, the meson clock drivers have been cleaned-up a bit, removing the gate embedded in the mpll driver, simplifying the pll driver and removing the legacy cpu_clk of meson8b The new code around the cpu clk of the meson8b is just re-implementation, using simple elements, of the old cpu_clk. What was failing before is still expected to fail now. Apparently this clock will need a bit more love to enable dvfs on meson8b. BTW, thanks a lot to Martin for trying this rework as early as he did !! With this series applied, the clock controllers of the gxbb, gxl and axg SoC will try get regmap from their parent DT node. If this fails, they will fallback to mapping the register themselves. This fallback will be kept until platform DTs have changed so clock controllers is a child of the HHI system controller. Based on this changeset, more patches are coming. For those interested, the WIP is available here [2] [0]: https://lkml.kernel.org/r/20180118110144.30619-1-jbrunet@baylibre.com [1]: https://lkml.kernel.org/r/20180122105759.12206-1-jbrunet@baylibre.com [2]: https://github.com/jeromebrunet/linux/tree/v4.16/meson/clk-regmap Jerome Brunet (19): clk: meson: use dev pointer where possible clk: meson: use devm_of_clk_add_hw_provider clk: meson: only one loop index is necessary in probe clk: meson: remove obsolete comments clk: meson: add regmap clocks clk: meson: switch gxbb ao_clk to clk_regmap clk: meson: remove superseded aoclk_gate_regmap clk: meson: add regmap to the clock controllers clk: meson: migrate gates to clk_regmap clk: meson: migrate dividers to clk_regmap clk: meson: migrate muxes to clk_regmap clk: meson: add regmap helpers for parm clk: meson: migrate mplls clocks to clk_regmap clk: meson: migrate the audio divider clock to clk_regmap clk: meson: migrate plls clocks to clk_regmap clk: meson: split divider and gate part of mpll clk: meson: rework meson8b cpu clock clk: meson: remove obsolete cpu_clk clk: meson: use hhi syscon if available drivers/clk/meson/Kconfig | 9 + drivers/clk/meson/Makefile | 5 +- drivers/clk/meson/axg.c | 722 +++++++++-------- drivers/clk/meson/axg.h | 6 +- drivers/clk/meson/clk-audio-divider.c | 63 +- drivers/clk/meson/clk-cpu.c | 178 ----- drivers/clk/meson/clk-mpll.c | 132 +--- drivers/clk/meson/clk-pll.c | 243 +++--- drivers/clk/meson/clk-regmap.c | 166 ++++ drivers/clk/meson/clk-regmap.h | 111 +++ drivers/clk/meson/clkc.h | 93 +-- drivers/clk/meson/gxbb-aoclk-regmap.c | 46 -- drivers/clk/meson/gxbb-aoclk.c | 20 +- drivers/clk/meson/gxbb-aoclk.h | 11 - drivers/clk/meson/gxbb.c | 1399 ++++++++++++++++++--------------- drivers/clk/meson/gxbb.h | 5 +- drivers/clk/meson/meson8b.c | 612 ++++++++------ drivers/clk/meson/meson8b.h | 11 +- 18 files changed, 2016 insertions(+), 1816 deletions(-) delete mode 100644 drivers/clk/meson/clk-cpu.c create mode 100644 drivers/clk/meson/clk-regmap.c create mode 100644 drivers/clk/meson/clk-regmap.h delete mode 100644 drivers/clk/meson/gxbb-aoclk-regmap.c -- 2.14.3