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[209.132.180.67]) by mx.google.com with ESMTP id p5si2892253pgq.124.2017.12.14.05.13.19; Thu, 14 Dec 2017 05:13:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=v3N3QvkT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752808AbdLNNNP (ORCPT + 20 others); Thu, 14 Dec 2017 08:13:15 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:22221 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752585AbdLNNNN (ORCPT ); Thu, 14 Dec 2017 08:13:13 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBEDA8Fj022171; Thu, 14 Dec 2017 07:10:08 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513257008; bh=XtfT/CMAIh0+fFKfxxv8By0CQR80kugwzTgXDqqNptY=; h=From:To:CC:Subject:Date; b=v3N3QvkT73mdJmChlJhedtM/kzXYvJEbTHxjdPnEDUJdCRhsosYCb6X6ZQlADG0cm 36oWODJf9FBKXUmvJyxOYoScK/jB0/kXmuiguTpM49b25QwmRy+S2hJ4k8Y/bnn4rR C2CSUAaplhdC/oB6Ly3CUr9THEbLtv4Y5FLSFxpE= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDA3P3013336; Thu, 14 Dec 2017 07:10:03 -0600 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 14 Dec 2017 07:10:02 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 14 Dec 2017 07:10:02 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBED9wdM032017; Thu, 14 Dec 2017 07:09:59 -0600 From: Kishon Vijay Abraham I To: Ulf Hansson , Rob Herring , Tony Lindgren , Adrian Hunter CC: Mark Rutland , Russell King , , , , , , , Subject: [PATCH 00/12] mmc: sdhci-omap: Add UHS/HS200 mode support Date: Thu, 14 Dec 2017 18:39:29 +0530 Message-ID: <20171214130941.26666-1-kishon@ti.com> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add UHS/HS200 mode support in sdhci-omap. The programming sequence for voltage switching, tuning is followed from AM572x TRM http://www.ti.com/lit/ug/spruhz6i/spruhz6i.pdf (Similar to all AM57x/DRA7x SoCs). The patch series also implements workaround for errata published in http://www.ti.com/lit/er/sprz429k/sprz429k.pdf. While most of this series is specific to sdhci-omap, it also patches sdhci to use software timer when the requested timeout is greater than hardware capablility. This re-uses the SW data timer already implemented in sdhci while disabling the HW timeout (so that spurious timeout is not observed). The patch for sdhci.c is based on an earlier patch that was done specific to omap_hsmmc.c (https://patchwork.kernel.org/patch/9791449/) It also includes a pdata-quirk patch since both pdata-quirks and sdhci-omap uses struct sdhci_omap_platform_data. The dt patches enabling UHS/HS200 will be follow this patch series. This series is created on git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git next Kishon Vijay Abraham I (12): mmc: sdhci-omap: Update 'power_mode' outside sdhci_omap_init_74_clocks mmc: sdhci-omap: Add card_busy host ops mmc: sdhci-omap: Add custom set_uhs_signaling sdhci_host ops mmc: sdhci-omap: Add tuning support mmc: sdhci-omap: Workaround for Errata i802 mmc: sdhci_omap: Add support to set IODELAY values mmc: sdhci_omap: Fix sdhci-omap quirks mmc: sdhci-omap: Add support to override f_max and iodelay from pdata mmc: sdhci: Use software timer when timeout greater than hardware capablility dt-bindings: sdhci-omap: Add K2G specific binding mmc: sdhci-omap: Add support for MMC/SD controller in k2g SoC ARM: OMAP2+: Use sdhci-omap specific pdata-quirks for MMC/SD on DRA74x EVM .../devicetree/bindings/mmc/sdhci-omap.txt | 2 + arch/arm/mach-omap2/pdata-quirks.c | 34 +- drivers/mmc/host/sdhci-omap.c | 446 ++++++++++++++++++++- drivers/mmc/host/sdhci.c | 41 +- drivers/mmc/host/sdhci.h | 11 + include/linux/platform_data/sdhci-omap.h | 35 ++ 6 files changed, 544 insertions(+), 25 deletions(-) create mode 100644 include/linux/platform_data/sdhci-omap.h -- 2.11.0