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[209.132.180.67]) by mx.google.com with ESMTP id m190si6098066pfc.400.2017.08.31.03.23.39; Thu, 31 Aug 2017 03:23:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=T7Nw3MUJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751685AbdHaKXg (ORCPT + 26 others); Thu, 31 Aug 2017 06:23:36 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:18610 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751646AbdHaKXd (ORCPT ); Thu, 31 Aug 2017 06:23:33 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v7VAJ2He019334; Thu, 31 Aug 2017 05:19:02 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1504174742; bh=wBUnEPp9zd0wnUnqMxafYLPZuYQCxRy+UeSWrQEXZEM=; h=From:To:CC:Subject:Date; b=T7Nw3MUJK1h++C4kjar2sQF/x2anDVNGXuRZVxrcMtJq/gXXbowSzpJr48eZg1pNC LX9JX0WXTCm+0KhXQLkcQUD9CvOrmBfpJJmgQQD7I9uThVeX9jIBT4647OVAyFv8a9 hp0wZwAR8wYhdrm4oCB4yS5Cr8l+VhXMR3gg8zys= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7VAIvrl007129; Thu, 31 Aug 2017 05:18:57 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 31 Aug 2017 05:18:57 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 31 Aug 2017 05:18:57 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7VAIq8V003436; Thu, 31 Aug 2017 05:18:53 -0500 From: Kishon Vijay Abraham I To: Ulf Hansson , Adrian Hunter , Rob Herring , Mark Rutland , Tony Lindgren , Liam Girdwood , Mark Brown CC: Sekhar Nori , Russell King , Ravikumar Kattekola , , , , , , Subject: [PATCH v2 0/6] mmc: Add OMAP SDHCI driver Date: Thu, 31 Aug 2017 15:48:43 +0530 Message-ID: <20170831101849.9489-1-kishon@ti.com> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is the first step in deprecating omap_hsmmc driver completely and moving to sdhci-omap driver which uses the sdhci library. This patch that adds a new SDHCI quirk "MMC_RSP_136" has already been merged and hence removed it in this revision. Apart from the quirk, sdhci-omap has it's own callbacks to set_clock (clock divider programming is different from generic sdhci) , set_power, set_bus_width, set_bus_mode and platform_send_init_74_clocks. These callback functions are implemented based on omap_hsmmc driver. Since sdhci-omap driver requires pbias regulator fixes to be present, I've sent them as part of this series. The sdhci-omap driver supports only the high speed mode and UHS/HS200 mode will be added in a later series. It has been tested only in boards having DRA7 SoCs like dra7-evm, dra72-evm, am571x-idk, am572x-idk, am57xx-evm. (Tested only eMMC and SD. SDIO support will be added later). The plan is to fully convert DRA7 SoC to use SDHCI driver and then convert other legacy platforms to use SDHCI. The first 3 patches have also been verified not to cause any regression. Next Steps: *) Add UHS support to sdhci-omap *) Add SDIO support *) Add support for older TI platforms Changes from v2: *) Rebased on git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git next *) Included a couple of patches from Ravikumar to fix pbias-regulator driver to support max-voltage of 3.3V. This is required for sdhci-omap driver. *) Create sdhci-omap as a new driver with MMC generic bindings and hence doesn't have bindings like ti,dual-volt added for omap-hsmmc. (Instead of ti,dual-volt, sdhci-omap driver uses the supported regulator voltage to set controller IO voltage capabilities). When omap-hsmmc driver is deprecated, support for these properties will be added to sdhci-omap. *) Fixed minor comments from Adrian). Changes from v1: *) Remove the quirks and instead use sdhci_omap specific callbacks for set_power, set_busmode etc. *) Add a patch from Adrian to tidy reading 136-bit responses I've also pushed the entire series along with dependent dt patches @ https://github.com/kishon/linux-wip.git ulf_next (in case someone wants to test) Kishon Vijay Abraham I (4): mmc: host: omap_hsmmc: Remove setting PBIAS voltage dt-bindings: sdhci-omap: Add bindings for the sdhci-omap controller mmc: sdhci-omap: Add OMAP SDHCI driver MAINTAINERS: Add TI OMAP SDHCI Maintainer Ravikumar Kattekola (2): regulator: pbias: Select voltage table based on max-voltage ARM: dts: dra7: Increase max-voltage of pbias regulator .../devicetree/bindings/mmc/sdhci-omap.txt | 16 + MAINTAINERS | 6 + arch/arm/boot/dts/dra7.dtsi | 2 +- drivers/mmc/host/Kconfig | 12 + drivers/mmc/host/Makefile | 1 + drivers/mmc/host/omap_hsmmc.c | 33 +- drivers/mmc/host/sdhci-omap.c | 604 +++++++++++++++++++++ drivers/regulator/pbias-regulator.c | 21 +- 8 files changed, 666 insertions(+), 29 deletions(-) create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-omap.txt create mode 100644 drivers/mmc/host/sdhci-omap.c -- 2.11.0