From patchwork Fri Jun 1 16:06:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 137539 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1126383lji; Fri, 1 Jun 2018 09:06:04 -0700 (PDT) X-Google-Smtp-Source: ADUXVKLf49fSPdtUwQyt3cAuZOvOcvyAd7isqfeY04yRM26RrUJCcePnWAOTD9icS4SFku7tPllW X-Received: by 2002:a17:902:8a:: with SMTP id a10-v6mr11598550pla.89.1527869164052; Fri, 01 Jun 2018 09:06:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527869164; cv=none; d=google.com; s=arc-20160816; b=P+bPZ/lpbS8D5h007GPivtJccUTWhMrTt+cjQpZcTg1uMkOXGASL7DTUMroRR0ZTT3 4GBDhN8dNtBdM3Byy3Da8Er+2m+33kDmETh1HsQTH+QY9VzKYbis545yjjgQBHLS42d2 DDyjwAOO7rDxY4xv+EbiR9w/Vl59pURn7aGwXVvaMBFKtzGIypnRe2d3LEQVAw9IkT7e EfCh6SVF8OIz5heqgMm77MzEjOXYPf32Yuc9BpL8fud1qU3/cG7LRzv4soiRKyjyz28x FLg5Orsxs4mSLzQlgoDVLb9sGQTQj/DntXr7nEqcBjaXUPoWMHk/X6HMfSmgGHAtjQec aIFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=/i4dEUzge41kibLYjFzoVTYoTvUHDYJxi7A+62cgTcI=; b=VydEeiKUZGiClrChKbJX/J903wO1qFrqIiAEX+0A4cEQF1HaVJoLL75tM2u9koczEl lrVAdo+TwbP+pPNuuX13S0PvOby1v+7m/c9y3+TMREHDyeAuBDAEebIBFmB6NEkpIQmT 4MnYP40bZKdEWVO44s3IJ9kfxccWyz2PgU5LloLGCEZT3kp6eSL9m/aCTJ0iIhWc61Ww VG67bv3cE9nZIEYxBJ93YHAx1oWfpOiE3zL77DKf5rwVq8a5aysux7XKrIfvh0Rg3W4Y bTUJ9CgHIvVb3YWKoAv1zoVUhhSWE9HiK5wqQrYFa4ICrCXQ2ndvqYRxBVqgGx7I9x+W 3qGg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o10-v6si4551939pgr.175.2018.06.01.09.06.03; Fri, 01 Jun 2018 09:06:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752704AbeFAQGB (ORCPT + 30 others); Fri, 1 Jun 2018 12:06:01 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:54952 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751422AbeFAQGA (ORCPT ); Fri, 1 Jun 2018 12:06:00 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B13D21529; Fri, 1 Jun 2018 09:05:59 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8255D3F557; Fri, 1 Jun 2018 09:05:59 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 0D7031AE504F; Fri, 1 Jun 2018 17:06:29 +0100 (BST) From: Will Deacon To: linux-kernel@vger.kernel.org Cc: peterz@infradead.org, mingo@kernel.org, linux-arm-kernel@lists.infradead.org, yamada.masahiro@socionext.com, Will Deacon Subject: [PATCH v2 0/9] Rewrite asm-generic/bitops/{atomic, lock}.h and use on arm64 Date: Fri, 1 Jun 2018 17:06:20 +0100 Message-Id: <1527869189-31512-1-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi all, This patch series has previously been posted in RFC form here: RFCv1: https://www.spinics.net/lists/arm-kernel/msg634719.html RFCv2: https://www.spinics.net/lists/arm-kernel/msg636875.html v1: https://www.spinics.net/lists/arm-kernel/msg655262.html The only change since v1 is that some of the fetch ops are replaced by non-value-returning ops for some of the atomic bitops. Thanks, Will --->8 Will Deacon (9): h8300: Don't include linux/kernel.h in asm/atomic.h m68k: Don't use asm-generic/bitops/lock.h asm-generic: Move some macros from linux/bitops.h to a new bits.h file openrisc: Don't pull in all of linux/bitops.h in asm/cmpxchg.h sh: Don't pull in all of linux/bitops.h in asm/cmpxchg-xchg.h asm-generic/bitops/atomic.h: Rewrite using atomic_* asm-generic/bitops/lock.h: Rewrite using atomic_fetch_* arm64: Replace our atomic/lock bitop implementations with asm-generic arm64: bitops: Include arch/arm64/include/asm/bitops.h | 21 +--- arch/arm64/lib/Makefile | 2 +- arch/arm64/lib/bitops.S | 76 --------------- arch/h8300/include/asm/atomic.h | 4 +- arch/m68k/include/asm/bitops.h | 6 +- arch/openrisc/include/asm/cmpxchg.h | 3 +- arch/sh/include/asm/cmpxchg-xchg.h | 3 +- include/asm-generic/bitops/atomic.h | 188 +++++++----------------------------- include/asm-generic/bitops/lock.h | 68 ++++++++++--- include/linux/bitops.h | 22 +---- include/linux/bits.h | 26 +++++ 11 files changed, 131 insertions(+), 288 deletions(-) delete mode 100644 arch/arm64/lib/bitops.S create mode 100644 include/linux/bits.h -- 2.1.4 Acked-by: Peter Zijlstra (Intel)