From patchwork Thu Sep 7 11:41:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 111888 Delivered-To: patch@linaro.org Received: by 10.140.94.239 with SMTP id g102csp680778qge; Thu, 7 Sep 2017 04:44:09 -0700 (PDT) X-Google-Smtp-Source: ADKCNb5Y9uz2O5D0h7XOHt1F4WqesJW+qgUbsZJtniu0x78uJAL3Akz0ZP2+CCekguZTSSfcZXy6 X-Received: by 10.84.133.193 with SMTP id f59mr2772246plf.224.1504784649123; Thu, 07 Sep 2017 04:44:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1504784649; cv=none; d=google.com; s=arc-20160816; b=BnAgiYpyW/fonOKkDSmftDGN9ZXhJTBSl9Nz+DHI16mWLsf956i0O9LG8qHwHYqKuk WwD+XqmUFwlSixZHHmY1+3lf1xdi6CbSC9MzTgGv6xCD40gn8pO3rer588JY7fBgfFER QI01EMCRIq85Z9v1ua96R693+LxB9v3z8pSgmxszfRTApe3tpzXJf7mUS+WYgdgDAjJN PyclDM1fA+eh2ENJco1fzFP9ycbIr5s1tJ5pFlgykXDQ5Mf/Cj2Pjzvhx2bcWDbBdqdX c3xPxBHHv3g8tQFSmP3YgilfqsTYouwWzEJWPLyQgYtRd9lUl4pvxkWAUaUp2OkwwfJq MScA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:dkim-filter:arc-authentication-results; bh=d5E/YrHhCVoogRF3dAVJd3wVxxZvl3mjiIFY4uP1Ce0=; b=r4oKaCGzNLLx2bAcaR3bTzyu3Wip940QGTOjXwJ9jPUfjvohlSRbO/ssaBFVnHlYLb C3omjuHvxpn7C/vzfIIn7DjurN5humMOTgHERCe7MLgIwqYE9EDwy5TUvfaXFzZjcA8w OLHhsfWNDHQgGK2dh0j6DwI8eSmdd1Xkad0MnKiDHcef3oR+dQkW9r9jARpwHomDObh9 YRtTWEeXBbltWy7yz9K7ysW7HjpeFgx1bkPguGE83JFGWilfTAUc9ZAdtoVaJEajIyMr Qy7NOCgKEriEBErCFHIlW1NjuXfqr+cboTOomRUbM2ce5PsbCizpPniDHKkLCwcPku2F iUIQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=FPS/7xP+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y101si1801879plh.60.2017.09.07.04.44.08; Thu, 07 Sep 2017 04:44:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=FPS/7xP+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755315AbdIGLoH (ORCPT + 26 others); Thu, 7 Sep 2017 07:44:07 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:17395 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755169AbdIGLoE (ORCPT ); Thu, 7 Sep 2017 07:44:04 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id v87BgcOw021413; Thu, 7 Sep 2017 20:42:39 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com v87BgcOw021413 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1504784560; bh=d5E/YrHhCVoogRF3dAVJd3wVxxZvl3mjiIFY4uP1Ce0=; h=From:To:Cc:Subject:Date:From; b=FPS/7xP+UZ0qMWi6kI3LRm6opa5tlLPbxNb59cTQeg+l/qf1BwEm+6iElJGWbsJ0a nf0pRDgsthWaXPIYSR4fozpSkdjonvXIlHmUVaidem4j6hqqzsnT93Ah+bbf4deBi7 I4c+u5oUuy9g6xIEEdHKaJQV45+FyudwBjB6ze5WhJu6gRKRDScj4nyCpsbXzmwYKs uiUSYs/DDB+3lEcXnlh12cxSNS0mUTAOkr6KDN8x8RmXBUlocpjR+KHJGV3RqDYIb5 drhwzRm/D3SAQLQBt4UJ61ul9oqAFqLXreOc6RLKFBoAS56v3nUOq2CRYdymWgIAca O7Yhn/VFeYOgg== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Marc Zyngier , Thomas Gleixner , Linus Walleij , linux-gpio@vger.kernel.org, Rob Herring Cc: Jassi Brar , devicetree@vger.kernel.org, Jason Cooper , Masami Hiramatsu , David Daney , Masahiro Yamada , linux-kernel@vger.kernel.org, Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 0/6] irqdomain, gpio: expand irq_domain_push_irq() for DT use and use it for GPIO Date: Thu, 7 Sep 2017 20:41:56 +0900 Message-Id: <1504784522-26841-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series adds a GPIO controller for UniPhier SoC family. It also works as an irqchip in hierarchy domain manner. My problem is mapping of IRQ from this controller to the parent irqchip is not contiguous. IRQ line of GPIO ---> Parent interrupt 0 ---> 48 1 ---> 49 ... 15 ---> 63 16 ---> 154 17 ---> 155 ... 20 ---> 158 21 ---> 217 22 ---> 218 ... So, I need to have an array of parent hwirqs somehow. Probably, most of people will try to use "interrupts" DT property, but I noticed a potential problem for hierarchy IRQ domain. If "interrupts" property exists in the device node, IRQ resource may be statically allocated when platform devices are populated from DT. I asked this question some time ago: https://lkml.org/lkml/2017/7/6/758 After I tackled this, I decided to put the array in the driver, but I could not get a positive response for this. The discussion mostly happened in v1 thread: http://patchwork.ozlabs.org/patch/797145/ Recently, the new API irq_domain_push_irq() was merged in the mainline. I thought this might be useful to solve the hierarchy domain issue. Hence, here is a trial. I found patch 2 is needed to avoid "type mismatch" error. One more thing, I am worried about a race condition. I think there is a possibility where a device tries to get IRQ after irq_domain_create_hierarchy(), but before irq_domain_push_irq(). priv->domain = irq_domain_create_hierarchy(...) if (!priv->domain) return -ENOMEM; [ *** What if a irq consumer device request the irq here? *** ] for (i = 0; i < nirqs; i++) { virq = platform_get_irq(pdev, i); if (virq < 0) continue; ret = irq_domain_push_irq(priv->domain, virq, (void *)(long)i); if (ret) return ret; } By the time irq_domain_create_hierarchy() finished, the irqdomain will be added to the "irq_domain_list". If a device calls platform_get_irq(), the domain is registered, but virq is not allocated yet. So, irq_create_fwspec_mapping() will call irq_domain_alloc_irqs(), then irqchip's .alloc() hook is invoked with fwspec passed as arg. I tried to fix this by patch 3 and 4. This topic is related to both irqdomain and GPIO, so includes them in a series. Comments are appreciated. I am not sure if my approach is correct. If I am doing wrong, I will go back to the previous adhoc solution. Masahiro Yamada (6): irqdomain: rename variables in irq_domain_{push,pop}_irq() irqdomain: clear trigger type in irq_domain_push_irq() irqdomain: move IRQ_DOMAIN_NAME_ALLOCATED define to the original position irqdomain: set irq domain flags before the irq domain becomes visible irqdomain: add IRQ_DOMAIN_FLAG_NO_CREATE flag gpio: uniphier: add UniPhier GPIO controller driver .../devicetree/bindings/gpio/gpio-uniphier.txt | 43 ++ MAINTAINERS | 1 + drivers/gpio/Kconfig | 8 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-uniphier.c | 486 +++++++++++++++++++++ include/dt-bindings/gpio/uniphier-gpio.h | 18 + include/linux/irqdomain.h | 22 +- kernel/irq/irqdomain.c | 93 ++-- 8 files changed, 619 insertions(+), 53 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-uniphier.txt create mode 100644 drivers/gpio/gpio-uniphier.c create mode 100644 include/dt-bindings/gpio/uniphier-gpio.h -- 2.7.4