From patchwork Thu Aug 3 13:44:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ding Tianhong X-Patchwork-Id: 109340 Delivered-To: patch@linaro.org Received: by 10.182.109.195 with SMTP id hu3csp13438obb; Thu, 3 Aug 2017 06:45:45 -0700 (PDT) X-Received: by 10.84.241.139 with SMTP id b11mr2060281pll.422.1501767945304; Thu, 03 Aug 2017 06:45:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1501767945; cv=none; d=google.com; s=arc-20160816; b=M3uSuV/J3dXaQMgwivmmnxeuuXUgVLwMTdehrGWw+KwZ09+eEawN21JxjDrV6mTtlZ qsNX8ijuzQrjgm9QNIy7DyLzu+6XLkJD/dxFHno32800nIf/I7DR7qvO3oRnFDrPgQ86 PUsmEncUUk96waZK9pf84Gi+KbW7OX46N7skh0dholR2zChHfhFFAEv0McqYM756auhC DSGKGqqYHcCotgEZnxRHVQwf9J4ZfytubtOHudqb4JR4IrsJX6moYBZb6hsquZojw4pV YH3YrdThVI5hYkiQ7ucfHloDH8OZ1B5lS5NgluJL0wNNbYOPGtGhMNC7XcjJzG4CVnzo oG+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:arc-authentication-results; bh=XovszgFan2Nl95vJei1j5EGXyNsanZcaGZ1DeiYAnEk=; b=Sfhn74Ga+Ahsw3WPkq98MbREnA6RVI+c531HiD6VbuORqUxRb9XbMdhyX7LILeCJ0q ikLaJXIjS3w5gnUgswss3sYDO/gU2KkcpeOQpKTht1DzTNtUBDnITNW6u28/NpTg+fTa hqcFLNCzckzKBee45iV9++w+aLQUGrqqOi3hpe9RnH6ts1XWC8zLsP96SSXWNajFQ5Cz l2ekrBRlVQIhQEvAB7UlXqw8fG7wOHFbwGi5EHhgMfEGLd1x0XFtkxorbj2TdOsZJwMp TprWerwGobdqQzlERsV/cUePTaVb9CzcIZRN86wA41ZFrfiTOTXWX3ES3K4vCvFSkt98 2XVQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l12si7983840plc.399.2017.08.03.06.45.45; Thu, 03 Aug 2017 06:45:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751868AbdHCNpl (ORCPT + 25 others); Thu, 3 Aug 2017 09:45:41 -0400 Received: from szxga03-in.huawei.com ([45.249.212.189]:9918 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751685AbdHCNpi (ORCPT ); Thu, 3 Aug 2017 09:45:38 -0400 Received: from 172.30.72.55 (EHLO DGGEML401-HUB.china.huawei.com) ([172.30.72.55]) by dggrg03-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id ASU39379; Thu, 03 Aug 2017 21:45:17 +0800 (CST) Received: from localhost (10.177.23.32) by DGGEML401-HUB.china.huawei.com (10.3.17.32) with Microsoft SMTP Server id 14.3.301.0; Thu, 3 Aug 2017 21:45:06 +0800 From: Ding Tianhong To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: Ding Tianhong Subject: [PATCH v8 0/4] Add new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag Date: Thu, 3 Aug 2017 21:44:45 +0800 Message-ID: <1501767889-7772-1-git-send-email-dingtianhong@huawei.com> X-Mailer: git-send-email 1.8.5.2.msysgit.0 MIME-Version: 1.0 X-Originating-IP: [10.177.23.32] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A0B0201.598328F1.0109, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: e3c503fa870d8eda006c9f0388403053 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some devices have problems with Transaction Layer Packets with the Relaxed Ordering Attribute set. This patch set adds a new PCIe Device Flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING, a set of PCI Quirks to catch some known devices with Relaxed Ordering issues, and a use of this new flag by the cxgb4 driver to avoid using Relaxed Ordering with problematic Root Complex Ports. It's been years since I've submitted kernel.org patches, I appolgise for the almost certain submission errors. v2: Alexander point out that the v1 was only a part of the whole solution, some platform which has some issues could use the new flag to indicate that it is not safe to enable relaxed ordering attribute, then we need to clear the relaxed ordering enable bits in the PCI configuration when initializing the device. So add a new second patch to modify the PCI initialization code to clear the relaxed ordering enable bit in the event that the root complex doesn't want relaxed ordering enabled. The third patch was base on the v1's second patch and only be changed to query the relaxed ordering enable bit in the PCI configuration space to allow the Chelsio NIC to send TLPs with the relaxed ordering attributes set. This version didn't plan to drop the defines for Intel Drivers to use the new checking way to enable relaxed ordering because it is not the hardest part of the moment, we could fix it in next patchset when this patches reach the goal. v3: Redesigned the logic for pci_configure_relaxed_ordering when configuration, If a PCIe device didn't enable the relaxed ordering attribute default, we should not do anything in the PCIe configuration, otherwise we should check if any of the devices above us do not support relaxed ordering by the PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag, then base on the result if we get a return that indicate that the relaxed ordering is not supported we should update our device to disable relaxed ordering in configuration space. If the device above us doesn't exist or isn't the PCIe device, we shouldn't do anything and skip updating relaxed ordering because we are probably running in a guest. v4: Rename the functions pcie_get_relaxed_ordering and pcie_disable_relaxed_ordering according John's suggestion, and modify the description, use the true/false as the return value. We shouldn't enable relaxed ordering attribute by the setting in the root complex configuration space for PCIe device, so fix it for cxgb4. Fix some format issues. v5: Removed the unnecessary code for some function which only return the bool value, and add the check for VF device. Make this patch set base on 4.12-rc5. v6: Fix the logic error in the need to enable the relaxed ordering attribute for cxgb4. v7: The cxgb4 drivers will enable the PCIe Capability Device Control[Relaxed Ordering Enable] in PCI Probe() routine, this will break our current solution for some platform which has problematic when enable the relaxed ordering attribute. According to the latest recommendations, remove the enable_pcie_relaxed_ordering(), although it could not cover the Peer-to-Peer scene, but we agree to leave this problem until we really trigger it. Make this patch set base on 4.12 release version. v8: Modify the change log for first 2 patches to make it more reasonable, and add the Acked-by from Alex and Ashok. Add a new patch to enable the Relaxed Ordering Attribute for cxgb4vf driver. Make this patch set base on 4.13-rc2. Casey Leedom (3): PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING net/cxgb4: Use new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag net/cxgb4vf: Use new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag Ding Tianhong (1): PCI: Disable PCIe Relaxed Ordering if unsupported drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 1 + drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 23 +++++++++---- drivers/net/ethernet/chelsio/cxgb4/sge.c | 5 +-- drivers/net/ethernet/chelsio/cxgb4vf/adapter.h | 1 + .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 18 ++++++++++ drivers/net/ethernet/chelsio/cxgb4vf/sge.c | 3 ++ drivers/pci/pci.c | 29 +++++++++++++++++ drivers/pci/probe.c | 37 +++++++++++++++++++++ drivers/pci/quirks.c | 38 ++++++++++++++++++++++ include/linux/pci.h | 4 +++ 10 files changed, 151 insertions(+), 8 deletions(-) -- 1.8.3.1