From patchwork Thu Jun 22 12:15:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ding Tianhong X-Patchwork-Id: 106204 Delivered-To: patch@linaro.org Received: by 10.140.91.2 with SMTP id y2csp83694qgd; Thu, 22 Jun 2017 05:16:40 -0700 (PDT) X-Received: by 10.98.60.204 with SMTP id b73mr2333570pfk.170.1498133800820; Thu, 22 Jun 2017 05:16:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1498133800; cv=none; d=google.com; s=arc-20160816; b=LpPpwXekpvt7K1C5ogb0/OCbp2Don+d75RZ5q+uQRsDQACakqNRN5pjcu9sBdcz4/1 T1sRBHeJbGIdfWugHidaxVfa5OrLpIHEC6rOxDxV7dp7BEXHGqK8Ych+cCCrjOeYd0qY 4ZZpmO5hiwUpIULsCeBAv8HN2CB1DHg5nPnYsfH5zaVsqoIL2dOYJZTMwzeKhGnOgMY/ 2CzWf32KBktdKSb0bVhs3YTOeV82TY/a7wvF3GexVsjZ4Y78ZxfQxdU0tCMLY3z2o/Ob GiGFcrdJDLul/K6+zODfb3ocsB1xEioMCEb4wXZk8sDT9FLlMiRFQWveKK4e8qyR0k5i Ktow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:arc-authentication-results; bh=BfMHwCDqtz1eAkie8nT19ktg6yvbigY9QzwbPvRwJ38=; b=VKJw7nXWTCziJz0WCzUnA5DK78F9n4idoIftlob31uY2Z8QqLkbDPWeU4ux7Otm+6w 0OOQ+GIEVSFuy5+w9uYluFkZp9WpzyEQV9ZTc0UQfvz2sJWc1kMea20we6iy9wMsJdbD Ayb5fWC1vxYW4aujlxtCUUzzqMdqpqfm9QjXt+AJq6i3YhjMyH3db1K2wY6i8+OBlkpm e8ChE1j5hV3m50/m0I6GcSc7HXbBoTSOSGvSc4MwgYMnlRslxl+cpFvs51mpO/ns6TKt Qy0PkKIgDP0a2lnCBwrdxsu8rudb9QjwueRchyTNPeo8SJ6abf2MEC2PnYWB/dnF2uHy dVzw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f5si1163600pln.12.2017.06.22.05.16.40; Thu, 22 Jun 2017 05:16:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753142AbdFVMQB (ORCPT + 25 others); Thu, 22 Jun 2017 08:16:01 -0400 Received: from szxga02-in.huawei.com ([45.249.212.188]:8812 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751835AbdFVMP7 (ORCPT ); Thu, 22 Jun 2017 08:15:59 -0400 Received: from 172.30.72.54 (EHLO DGGEML404-HUB.china.huawei.com) ([172.30.72.54]) by dggrg02-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id APV26026; Thu, 22 Jun 2017 20:15:39 +0800 (CST) Received: from localhost (10.177.23.32) by DGGEML404-HUB.china.huawei.com (10.3.17.39) with Microsoft SMTP Server id 14.3.301.0; Thu, 22 Jun 2017 20:15:26 +0800 From: Ding Tianhong To: , , , , , , , , , , , , , , , , , , , , , , , CC: Ding Tianhong Subject: [PATCH v6 0/3] Add new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag Date: Thu, 22 Jun 2017 20:15:18 +0800 Message-ID: <1498133721-21152-1-git-send-email-dingtianhong@huawei.com> X-Mailer: git-send-email 1.8.5.2.msysgit.0 MIME-Version: 1.0 X-Originating-IP: [10.177.23.32] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020204.594BB4ED.01E3, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 20e3e5a30775afc54d2ce4c2279b3916 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some devices have problems with Transaction Layer Packets with the Relaxed Ordering Attribute set. This patch set adds a new PCIe Device Flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING, a set of PCI Quirks to catch some known devices with Relaxed Ordering issues, and a use of this new flag by the cxgb4 driver to avoid using Relaxed Ordering with problematic Root Complex Ports. It's been years since I've submitted kernel.org patches, I appolgise for the almost certain submission errors. v2: Alexander point out that the v1 was only a part of the whole solution, some platform which has some issues could use the new flag to indicate that it is not safe to enable relaxed ordering attribute, then we need to clear the relaxed ordering enable bits in the PCI configuration when initializing the device. So add a new second patch to modify the PCI initialization code to clear the relaxed ordering enable bit in the event that the root complex doesn't want relaxed ordering enabled. The third patch was base on the v1's second patch and only be changed to query the relaxed ordering enable bit in the PCI configuration space to allow the Chelsio NIC to send TLPs with the relaxed ordering attributes set. This version didn't plan to drop the defines for Intel Drivers to use the new checking way to enable relaxed ordering because it is not the hardest part of the moment, we could fix it in next patchset when this patches reach the goal. v3: Redesigned the logic for pci_configure_relaxed_ordering when configuration, If a PCIe device didn't enable the relaxed ordering attribute default, we should not do anything in the PCIe configuration, otherwise we should check if any of the devices above us do not support relaxed ordering by the PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag, then base on the result if we get a return that indicate that the relaxed ordering is not supported we should update our device to disable relaxed ordering in configuration space. If the device above us doesn't exist or isn't the PCIe device, we shouldn't do anything and skip updating relaxed ordering because we are probably running in a guest. v4: Rename the functions pcie_get_relaxed_ordering and pcie_disable_relaxed_ordering according John's suggestion, and modify the description, use the true/false as the return value. We shouldn't enable relaxed ordering attribute by the setting in the root complex configuration space for PCIe device, so fix it for cxgb4. Fix some format issues. v5: Removed the unnecessary code for some function which only return the bool value, and add the check for VF device. Make this patch set base on 4.12-rc5. v6: Fix the logic error in the need to enable the relaxed ordering attribute for cxgb4. Casey Leedom (2): PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING net/cxgb4: Use new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag Ding Tianhong (1): PCI: Enable PCIe Relaxed Ordering if supported drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 1 + drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 17 ++++++++++ drivers/net/ethernet/chelsio/cxgb4/sge.c | 5 +-- drivers/pci/pci.c | 32 +++++++++++++++++++ drivers/pci/probe.c | 41 +++++++++++++++++++++++++ drivers/pci/quirks.c | 38 +++++++++++++++++++++++ include/linux/pci.h | 4 +++ 7 files changed, 136 insertions(+), 2 deletions(-) -- 1.9.0