From patchwork Mon Jun 12 11:05:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ding Tianhong X-Patchwork-Id: 103610 Delivered-To: patch@linaro.org Received: by 10.182.29.35 with SMTP id g3csp831965obh; Mon, 12 Jun 2017 04:06:31 -0700 (PDT) X-Received: by 10.99.176.67 with SMTP id z3mr33025413pgo.78.1497265591047; Mon, 12 Jun 2017 04:06:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497265591; cv=none; d=google.com; s=arc-20160816; b=frNrcwzNimYNQmaxyKXag8eJVo6dTB6XGMdQQlkovLOU1zGf56haL1cQOH3HkhhrV3 wm8l2L3CmX8PuEx1uRO7w4eHb0IqsmuI+buyl99cGfQdteucwia/oOsqxmVEflDuwF4+ 66tsVJrfMcSd6gKLz8wfJylAAR1aCrsennvy+rujuCnPjPmp2emfqfya6A5VkwDW9IB+ zbLlWc5/vOHOzRSwnkJ1/Lro7Fw3U4OroIfS4Kx/+ENMpWpXIcv5CAiU5jCMyKoPi345 p8K5uDjVSUbTjcDMCQvhMEJn14nYPM8Gz1BRLNqYBuZbkxp0aO3oLJIayuBCbAe2wzbU WSAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:arc-authentication-results; bh=TOmFulDdT2eQov/MMl4pIPMLfmWXH6ADrMiuwBFl7tA=; b=lc8wo/r2Ho1bSKYPBNx6i8LYlsNHXQl/8MZZV1iwwreED9gW4NsF7Agk9K76XjGIL+ /ngx4qwBJcqkLTx2RwF7Z04SyeNJd85czCwismCA6yRrMwDyKwUC9UPnn/QZz17GB0xa Lza/KWwrE5Ae3mfsbcjBH97532qAGjmNPPs6cd+WrhFmW8eTlD6d6Jn0DVnEbcq5m5EE NqbYi7uBiggFziA9TxgXF+52EMD7YPaQyTeELutEhg73vFGZDRaXqwQinMX+w0eFvc42 MEe2SHWNztqCr6swB8NxIg2j1fsHCkXItGDo+dW4ckJGu7OB3+2j/CSh7228Kxqwpy0t rDog== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 66si6757578pfp.12.2017.06.12.04.06.30; Mon, 12 Jun 2017 04:06:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752639AbdFLLG2 (ORCPT + 25 others); Mon, 12 Jun 2017 07:06:28 -0400 Received: from szxga02-in.huawei.com ([45.249.212.188]:7373 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752024AbdFLLG0 (ORCPT ); Mon, 12 Jun 2017 07:06:26 -0400 Received: from 172.30.72.55 (EHLO dggeml406-hub.china.huawei.com) ([172.30.72.55]) by dggrg02-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id APF17469; Mon, 12 Jun 2017 19:06:08 +0800 (CST) Received: from localhost (10.177.23.32) by dggeml406-hub.china.huawei.com (10.3.17.50) with Microsoft SMTP Server id 14.3.301.0; Mon, 12 Jun 2017 19:05:57 +0800 From: Ding Tianhong To: , , , , , , , , , , , , , , , , , , , , , , , CC: Ding Tianhong Subject: [PATCH v4 0/3] Add new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag Date: Mon, 12 Jun 2017 19:05:22 +0800 Message-ID: <1497265525-4752-1-git-send-email-dingtianhong@huawei.com> X-Mailer: git-send-email 1.8.5.2.msysgit.0 MIME-Version: 1.0 X-Originating-IP: [10.177.23.32] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020202.593E75A2.0133, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 2a95b9be0eb0d43346bd2560b6afd84d Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some devices have problems with Transaction Layer Packets with the Relaxed Ordering Attribute set. This patch set adds a new PCIe Device Flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING, a set of PCI Quirks to catch some known devices with Relaxed Ordering issues, and a use of this new flag by the cxgb4 driver to avoid using Relaxed Ordering with problematic Root Complex Ports. It's been years since I've submitted kernel.org patches, I appolgise for the almost certain submission errors. v2: Alexander point out that the v1 was only a part of the whole solution, some platform which has some issues could use the new flag to indicate that it is not safe to enable relaxed ordering attribute, then we need to clear the relaxed ordering enable bits in the PCI configuration when initializing the device. So add a new second patch to modify the PCI initialization code to clear the relaxed ordering enable bit in the event that the root complex doesn't want relaxed ordering enabled. The third patch was base on the v1's second patch and only be changed to query the relaxed ordering enable bit in the PCI configuration space to allow the Chelsio NIC to send TLPs with the relaxed ordering attributes set. This version didn't plan to drop the defines for Intel Drivers to use the new checking way to enable relaxed ordering because it is not the hardest part of the moment, we could fix it in next patchset when this patches reach the goal. v3: Redesigned the logic for pci_configure_relaxed_ordering when configuration, If a PCIe device didn't enable the relaxed ordering attribute default, we should not do anything in the PCIe configuration, otherwise we should check if any of the devices above us do not support relaxed ordering by the PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag, then base on the result if we get a return that indicate that the relaxed ordering is not supported we should update our device to disable relaxed ordering in configuration space. If the device above us doesn't exist or isn't the PCIe device, we shouldn't do anything and skip updating relaxed ordering because we are probably running in a guest. v4: Rename the functions pcie_get_relaxed_ordering and pcie_disable_relaxed_ordering according John's suggestion, and modify the description, use the true/false as the return value. We shouldn't enable relaxed ordering attribute by the setting in the root complex configuration space for PCIe device, so fix it for cxgb4. Fix some format issues. Casey Leedom (2): PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING net/cxgb4: Use new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag Ding Tianhong (1): PCI: Enable PCIe Relaxed Ordering if supported drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 1 + drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 17 ++++++++++ drivers/net/ethernet/chelsio/cxgb4/sge.c | 5 +-- drivers/pci/pci.c | 32 +++++++++++++++++++ drivers/pci/probe.c | 41 +++++++++++++++++++++++++ drivers/pci/quirks.c | 38 +++++++++++++++++++++++ include/linux/pci.h | 4 +++ 7 files changed, 136 insertions(+), 2 deletions(-) -- 1.9.0