From patchwork Sat Jun 3 04:04:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ding Tianhong X-Patchwork-Id: 101298 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp41551qgd; Fri, 2 Jun 2017 21:05:09 -0700 (PDT) X-Received: by 10.101.83.195 with SMTP id z3mr10469607pgr.122.1496462709593; Fri, 02 Jun 2017 21:05:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1496462709; cv=none; d=google.com; s=arc-20160816; b=ZUKHL8ESW/AZEWylcDwa1AdLukiegsBR0oJjvPpVB2gWaDRHvkmmHh3ciyF9CdhSw1 jfIkKyLizR74XJnuA5RjV8hhwz50eLdFKb/K6Fe/Gs5d4Lu+wgDuA7V+DZ6B2t7D0UeA DWuD71fR8xiL4qyDZAiutio+XDvG7HqGoFN4q38cl4IDlGYoY/tOVnl93MqOcouuGoBh UP0JFy846N9tK5fAgajtGW1HfyHx/RHrzipsGJzI4cNi5hEO5HpON5kRNXnUw3321AxC meFitkPuAdNJ/mxXIwnb3nRo6YPNuAvNwXloHTZHYB2ZV0yu9kOrX/Nw/bzxdr2err7w 5LLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:arc-authentication-results; bh=LxXsaqYcc/Odr6SWZr6LcBb/Nq/vdZ6vSpjMuhFT2bc=; b=cFDJroypDqsWWttE2HYCdjSWQw4bUWoTZeqnWlDPbNWj1fwxY+te/Ee+lVY1oSsWEV uqfKtQeEtW4Fdq9iCY7kzJoKBWpg/Dq9BRi6FOIzshwoNb7HZAnuVyi8H+6jN47IQOJJ AmibPtlY5THS9WgGjGXfTHNLwesVKhX7itMCCRTwHvVlzbYoC/yL7EwRqY0E5+buqC8v SZ2A38Jbf/iuWn/3tMWztBSkBc3SG2CV3bV2FjSQ/G+5wPNOC5VFELVBWcVEsF1q/3S4 DiJg2Trvzj+lJc1AApiZNaJEyJJ407uPLLmf3yIVckIVP91i4n1g9BArEJeS1wHeQSoa r5Hg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q1si707856pge.144.2017.06.02.21.05.09; Fri, 02 Jun 2017 21:05:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751333AbdFCEFG (ORCPT + 25 others); Sat, 3 Jun 2017 00:05:06 -0400 Received: from szxga01-in.huawei.com ([45.249.212.187]:7300 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751169AbdFCEEq (ORCPT ); Sat, 3 Jun 2017 00:04:46 -0400 Received: from 172.30.72.56 (EHLO dggeml406-hub.china.huawei.com) ([172.30.72.56]) by dggrg01-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id APR03906; Sat, 03 Jun 2017 12:04:25 +0800 (CST) Received: from localhost (10.177.23.32) by dggeml406-hub.china.huawei.com (10.3.17.50) with Microsoft SMTP Server id 14.3.301.0; Sat, 3 Jun 2017 12:04:12 +0800 From: Ding Tianhong To: , , , , , , , , , , , , , , , , , , , , , , , CC: Ding Tianhong Subject: [PATCH v2 0/3] Add new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag Date: Sat, 3 Jun 2017 12:04:04 +0800 Message-ID: <1496462647-7632-1-git-send-email-dingtianhong@huawei.com> X-Mailer: git-send-email 1.8.5.2.msysgit.0 MIME-Version: 1.0 X-Originating-IP: [10.177.23.32] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090202.5932354A.0034, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: ff6247567bbceb9d628d9e80edf61775 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some devices have problems with Transaction Layer Packets with the Relaxed Ordering Attribute set. This patch set adds a new PCIe Device Flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING, a set of PCI Quirks to catch some known devices with Relaxed Ordering issues, and a use of this new flag by the cxgb4 driver to avoid using Relaxed Ordering with problematic Root Complex Ports. It's been years since I've submitted kernel.org patches, I appolgise for the almost certain submission errors. v2: Alexander point out that the v1 was only a part of the whole solution, some platform which has some issues could use the new flag to indicate that it is not safe to enable relaxed ordering attribute, then we need to clear the relaxed ordering enable bits in the PCI configuration when initializing the device. So add a new second patch to modify the PCI initialization code to clear the relaxed ordering enable bit in the event that the root complex doesn't want relaxed ordering enabled. The third patch was base on the v1's second patch and only be changed to query the relaxed ordering enable bit in the PCI configuration space to allow the Chelsio NIC to send TLPs with the relaxed ordering attributes set. This version didn't plan to drop the defines for Intel Drivers to use the new checking way to enable relaxed ordering because it is not the hardest part of the moment, we could fix it in next patchset when this patches reach the goal. Casey Leedom (2): PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING net/cxgb4: Use new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag Ding Tianhong (1): PCI: Enable PCIe Relaxed Ordering if supported drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 1 + drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 17 ++++++++++ drivers/net/ethernet/chelsio/cxgb4/sge.c | 5 +-- drivers/pci/pci.c | 42 +++++++++++++++++++++++++ drivers/pci/probe.c | 11 +++++++ drivers/pci/quirks.c | 38 ++++++++++++++++++++++ include/linux/pci.h | 5 +++ 7 files changed, 117 insertions(+), 2 deletions(-) -- 1.9.0