From patchwork Mon May 22 14:06:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabriele Paoloni X-Patchwork-Id: 100304 Delivered-To: patch@linaro.org Received: by 10.182.142.97 with SMTP id rv1csp1413905obb; Mon, 22 May 2017 07:08:32 -0700 (PDT) X-Received: by 10.98.23.74 with SMTP id 71mr25618651pfx.30.1495462111985; Mon, 22 May 2017 07:08:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495462111; cv=none; d=google.com; s=arc-20160816; b=J6uKPoh7glJz/G0BKO+gvUTgWKElrAT01gD38weVIWj+eVvumQ2oJwWr2NHFrg4E8m pWJsTzK99SlHeNiUhbePIZ+4aQ1frNVV7S+zJwwiqICWhvH6TpHL9Ejk7dETp1igc2me 98r87AG7DeImfEdcTrQCVWtBvsAzMCpxPPdKhZN0uXWFwI6XISBuO6jydmjHVJv/4Ccc iIxRtV+VOvFe9yKSlH6iSkc1NP0W/U5vKvOzqawgTYIIOBnPHeD/e87uWCILdBm+Gr5R C/ahlklp81UZrzVDZcjo1A7YyAoYNpO9tNvGjVFy42kAP7NrD5IM0yiTcl6ix/toFAq6 AiFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:arc-authentication-results; bh=jqTlsdH88U28TY+Ylbp2BNuo/v6llRMF+VolQTzhTcY=; b=k5+HOR+EXtZA6k62DGews+OvoFjuih7FF48QFv5KVnobj7KQpdvzO5GATaZ7rOrxR5 6bgaPDYH9a6gdqbJu/zioAV6Mt/qXmPRZHHS0Q+4UA7WPafVvssDSsAE/QPSsWxl2r49 eiQaExMXYnekcTPlaAl6fXbEfloKfYuE3v0KfWsglC/1Z+nDbIXz5pCfPOV9DydOXd0G UT2PwZ6LCpHrlihm50AZkR+ed97Z7SegZShdLqorr7+KcJBAkTA4jM75+wRw0FuOmXjT B1rGucbKnSg84Tca/yKH6pU/jSnA010Qt+GTo3korxuPKwnedAXwUTIfdmuPIhOuhQAn BBNg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f5si4423026pgn.308.2017.05.22.07.08.31; Mon, 22 May 2017 07:08:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934301AbdEVOI0 (ORCPT + 25 others); Mon, 22 May 2017 10:08:26 -0400 Received: from szxga03-in.huawei.com ([45.249.212.189]:6437 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933798AbdEVOIW (ORCPT ); Mon, 22 May 2017 10:08:22 -0400 Received: from 172.30.72.55 (EHLO DGGEML404-HUB.china.huawei.com) ([172.30.72.55]) by dggrg03-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id AOC40766; Mon, 22 May 2017 22:07:18 +0800 (CST) Received: from G00308965-DELL1.china.huawei.com (10.203.181.156) by DGGEML404-HUB.china.huawei.com (10.3.17.39) with Microsoft SMTP Server id 14.3.301.0; Mon, 22 May 2017 22:07:11 +0800 From: Gabriele Paoloni To: , CC: , , , , , , , Subject: [PATCH v4 0/2] add MSI support for PCIe port services and DPC IRQ support Date: Mon, 22 May 2017 15:06:56 +0100 Message-ID: <1495462018-7756-1-git-send-email-gabriele.paoloni@huawei.com> X-Mailer: git-send-email 2.7.1.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.203.181.156] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020203.5922F097.0147, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: fae3bcbf021812830b15f47c5d089026 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: gabriele paoloni This patchset: 1) adds support for MSI interrupt vectors to be used for Roor Port services 2) adds support for DPC Root Port service interrupt The patchset has been tested on Hisilicon Hip08 Chipset Changes from v3: - removed 2 extra lines at the bottom of comments Changes from v2: - Fixed comment mismatch for function pcie_port_enable_irq_vec - removed redundant commet on pci_irq_vector() Changes from v1: According to comments from Christoph Hellwig in https://www.spinics.net/lists/kernel/msg2508842.html and https://www.spinics.net/lists/kernel/msg2508850.html - reduced the calls of pci_alloc_irq_vectors by ORing PCI_IRQ_MSIX and PCI_IRQ_MSI - used a unique macro for the max number of MSI/MSIx interrupt vectors - reworked pcie_init_service_irqs() to call pci_alloc_irq_vectors() only for legacy IRQ Gabriele Paoloni (1): PCI/portdrv: add support for different MSI interrupts for PCIe port services gabriele paoloni (1): PCI/portdrv: allocate MSI/MSIx vector for DPC RP service drivers/pci/pcie/portdrv.h | 8 +++-- drivers/pci/pcie/portdrv_core.c | 66 ++++++++++++++++++++++++++++++----------- 2 files changed, 53 insertions(+), 21 deletions(-) -- 2.7.4