From patchwork Thu May 18 10:35:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabriele Paoloni X-Patchwork-Id: 100081 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp651653qge; Thu, 18 May 2017 03:40:00 -0700 (PDT) X-Received: by 10.84.248.73 with SMTP id e9mr4103449pln.76.1495103999995; Thu, 18 May 2017 03:39:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495103999; cv=none; d=google.com; s=arc-20160816; b=XqpH3Pj9pyimhtjqMVpb269QjiMgFnNWlFR8qXLEfi/5jf1CvrGR4mpcKCGW8rKZuE j/QGawgh8iDypuSP0fh+e9CAdzZADq9/XGnhlk7+caGCaaCFt9wdacJXac7GyL16Jdvf iaIfyilV5Y3idjMFll6ajDjOIgH+UPycKLm5gBQB/o8MPONm4Fmi367GA/Apo39g/QZ1 yOJPzi8EV2YaKBg1esUVPdi4beoD89O6XZ3OdXFOTfJmPjYT9o6xSQpPda1C7i1byLpo sU0EARFHu5QBiFGdqZ5Fxw6XN0mtzbXLzxFbIRTerWXVZzx7GjpEDxwzRm0ZWwGqhUYa qj0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:arc-authentication-results; bh=wAgMoOjfLe9U9+WJuai4qYAscw/7pj6pAivTrA5Ujco=; b=qjI8iR9CFzCIAXqk3HXZZmFHcKxWzdr3qgL1sOh+YPtRBRYauCK9uahkHhOubzP/YO U4m8fBbi6f6N1xgwEiUFj0TNg7xFDBiLqcJfIdSonEvnEGqUcchLrvUmbLxkqzUAeNcJ qdT75W+RFlHxutcz6SswUgZ1v26yWPDtwoFXTowrN/bCyMxfcnmX90BxXpSCT962vK98 fOnioIbJT/OH6+vpuJNZ9xAznkH8yMrJnnQOJqhqU5h0AxkC/pqL5Sl8dj0mo4RWpgFH 80GWt4qpU2ekucZxyom0hQ/0rwvmSWLT7N88uXZ62X5PSLWUcURod+pBSJbqN6k7SgPa eSrA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c6si4808987pfb.147.2017.05.18.03.39.59; Thu, 18 May 2017 03:39:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755594AbdERKjg (ORCPT + 25 others); Thu, 18 May 2017 06:39:36 -0400 Received: from szxga02-in.huawei.com ([45.249.212.188]:6354 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752689AbdERKje (ORCPT ); Thu, 18 May 2017 06:39:34 -0400 Received: from 172.30.72.56 (EHLO dggeml406-hub.china.huawei.com) ([172.30.72.56]) by dggrg02-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id ANU82661; Thu, 18 May 2017 18:36:12 +0800 (CST) Received: from G00308965-DELL1.china.huawei.com (10.203.181.162) by dggeml406-hub.china.huawei.com (10.3.17.50) with Microsoft SMTP Server id 14.3.301.0; Thu, 18 May 2017 18:36:01 +0800 From: Gabriele Paoloni To: , CC: , , , , , , , Subject: [PATCH v3 0/2] add MSI support for PCIe port services and DPC IRQ support Date: Thu, 18 May 2017 11:35:46 +0100 Message-ID: <1495103748-7876-1-git-send-email-gabriele.paoloni@huawei.com> X-Mailer: git-send-email 2.7.1.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.203.181.162] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090201.591D791F.0008, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: b552ea77dd1eb15ae7b4b14c2d3d1fad Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: gabriele paoloni This patchset: 1) adds support for MSI interrupt vectors to be used for Roor Port services 2) adds support for DPC Root Port service interrupt The patchset has been tested on Hisilicon Hip08 Chipset Changes from v2: - Fixed comment mismatch for function pcie_port_enable_irq_vec - removed redundant commet on pci_irq_vector() Changes from v1: According to comments from Christoph Hellwig in https://www.spinics.net/lists/kernel/msg2508842.html and https://www.spinics.net/lists/kernel/msg2508850.html - reduced the calls of pci_alloc_irq_vectors by ORing PCI_IRQ_MSIX and PCI_IRQ_MSI - used a unique macro for the max number of MSI/MSIx interrupt vectors - reworked pcie_init_service_irqs() to call pci_alloc_irq_vectors() only for legacy IRQ Gabriele Paoloni (1): PCI/portdrv: add support for different MSI interrupts for PCIe port services gabriele paoloni (1): PCI/portdrv: allocate MSI/MSIx vector for DPC RP service drivers/pci/pcie/portdrv.h | 8 +++-- drivers/pci/pcie/portdrv_core.c | 68 ++++++++++++++++++++++++++++++----------- 2 files changed, 55 insertions(+), 21 deletions(-) -- 2.7.4