From patchwork Mon Jan 23 11:19:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 92207 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1176427qgi; Mon, 23 Jan 2017 03:21:19 -0800 (PST) X-Received: by 10.99.114.91 with SMTP id c27mr31995074pgn.163.1485170479540; Mon, 23 Jan 2017 03:21:19 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t1si15340171pgt.218.2017.01.23.03.21.19; Mon, 23 Jan 2017 03:21:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751247AbdAWLVN (ORCPT + 25 others); Mon, 23 Jan 2017 06:21:13 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:43631 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751152AbdAWLVK (ORCPT ); Mon, 23 Jan 2017 06:21:10 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v0NBJpPm004801; Mon, 23 Jan 2017 05:19:51 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0NBJkTe013853; Mon, 23 Jan 2017 05:19:46 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Mon, 23 Jan 2017 05:19:45 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0NBJgSK009680; Mon, 23 Jan 2017 05:19:43 -0600 From: Roger Quadros To: , CC: , , , , , Roger Quadros Subject: [PATCH 0/8] usb: dwc3: add dual-role support Date: Mon, 23 Jan 2017 13:19:33 +0200 Message-ID: <1485170381-32110-1-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, We rely on the OTG controller block to provide us with VBUS and ID line status via an interrupt. This is then used to switch the controller between host, peripheral and idle roles based on the following table. ID VBUS dual-role state -- ---- --------------- 0 x A_HOST - Host controller active 1 0 B_IDLE - Both Host and Gadget controllers inactive 1 1 B_PERIPHERAL - Gadget controller active Couple of things to clarify: - There is a small window where we can potentially miss an event related to OTG. I've added a comment in the code where this could happen. How can we prevent this? Is it better to just leave the OTG events unmasked (but keep otg_irq on ARM GIC disabled) so that any new events can be captured by the OTG event register and interrupt re-triggered if it has not been serviced by the previous interrupt. - I'm running the entire dual-role state change logic inside the threaded interrupt handler with dwc->lock (spinlock) held but IRQs enabled. OTG events are very rare i.e. manual intervention so I don't see this as a problem. Just wanted to double check. - Some SoC's (e.g. Qualcomm MSM) do not have the OTG controller block but do have both host and peripheral controllers and so can operate in dual role mode. Current series does not address this case. We can get dual-role to work with such SoCs if core.c can get information about ID and VBUS somehow (private interface from parent or directly read extcon?). cheers, -roger Roger Quadros (8): usb: otg-fsm: Prevent build warning "VDBG" redefined usb: dwc3-omap: Fix missing break in dwc3_omap_set_mailbox() usb: dwc3: use BIT() macro where possible usb: dwc3: core.h: add some register definitions usb: dwc3: add dual-role support ARM: dts: dra7x-evm: Enable dual-role mode for USB1 ARM: dts: am43xx: Enable dual-role mode for USB1 ARM: dts: am57xx-idk: Enable dual-role mode for USB2 arch/arm/boot/dts/am437x-gp-evm.dts | 2 +- arch/arm/boot/dts/am437x-sk-evm.dts | 2 +- arch/arm/boot/dts/am43x-epos-evm.dts | 2 +- arch/arm/boot/dts/am57xx-idk-common.dtsi | 2 +- arch/arm/boot/dts/dra7-evm.dts | 2 +- arch/arm/boot/dts/dra72-evm-common.dtsi | 2 +- drivers/usb/common/usb-otg-fsm.c | 7 + drivers/usb/dwc3/core.c | 583 ++++++++++++++++++++++++++++++- drivers/usb/dwc3/core.h | 312 ++++++++++++----- drivers/usb/dwc3/dwc3-omap.c | 49 +-- drivers/usb/dwc3/gadget.c | 18 +- drivers/usb/dwc3/gadget.h | 20 +- drivers/usb/phy/phy-fsl-usb.c | 7 + include/linux/usb/otg-fsm.h | 15 - 14 files changed, 848 insertions(+), 175 deletions(-) -- 2.7.4