@@ -19,10 +19,6 @@
#define IWL_22000_NVM_VERSION 0x0a1d
/* Memory offsets and lengths */
-#define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */
-#define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */
-#define IWL_22000_DCCM2_OFFSET 0x880000
-#define IWL_22000_DCCM2_LEN 0x8000
#define IWL_22000_SMEM_OFFSET 0x400000
#define IWL_22000_SMEM_LEN 0xD0000
@@ -64,10 +60,6 @@ static const struct iwl_family_base_params iwl_22000_base = {
.ucode_api_min = IWL_22000_UCODE_API_MIN, \
.led_mode = IWL_LED_RF_STATE, \
.non_shared_ant = ANT_B, \
- .dccm_offset = IWL_22000_DCCM_OFFSET, \
- .dccm_len = IWL_22000_DCCM_LEN, \
- .dccm2_offset = IWL_22000_DCCM2_OFFSET, \
- .dccm2_len = IWL_22000_DCCM2_LEN, \
.smem_offset = IWL_22000_SMEM_OFFSET, \
.smem_len = IWL_22000_SMEM_LEN, \
.features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \
@@ -19,10 +19,6 @@
#define IWL_AX210_NVM_VERSION 0x0a1d
/* Memory offsets and lengths */
-#define IWL_AX210_DCCM_OFFSET 0x800000 /* LMAC1 */
-#define IWL_AX210_DCCM_LEN 0x10000 /* LMAC1 */
-#define IWL_AX210_DCCM2_OFFSET 0x880000
-#define IWL_AX210_DCCM2_LEN 0x8000
#define IWL_AX210_SMEM_OFFSET 0x400000
#define IWL_AX210_SMEM_LEN 0xD0000
@@ -62,10 +58,6 @@ static const struct iwl_family_base_params iwl_ax210_base = {
.ucode_api_min = IWL_AX210_UCODE_API_MIN, \
.led_mode = IWL_LED_RF_STATE, \
.non_shared_ant = ANT_B, \
- .dccm_offset = IWL_AX210_DCCM_OFFSET, \
- .dccm_len = IWL_AX210_DCCM_LEN, \
- .dccm2_offset = IWL_AX210_DCCM2_OFFSET, \
- .dccm2_len = IWL_AX210_DCCM2_LEN, \
.smem_offset = IWL_AX210_SMEM_OFFSET, \
.smem_len = IWL_AX210_SMEM_LEN, \
.features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \
@@ -19,10 +19,6 @@
#define IWL_BZ_NVM_VERSION 0x0a1d
/* Memory offsets and lengths */
-#define IWL_BZ_DCCM_OFFSET 0x800000 /* LMAC1 */
-#define IWL_BZ_DCCM_LEN 0x10000 /* LMAC1 */
-#define IWL_BZ_DCCM2_OFFSET 0x880000
-#define IWL_BZ_DCCM2_LEN 0x8000
#define IWL_BZ_SMEM_OFFSET 0x400000
#define IWL_BZ_SMEM_LEN 0xD0000
@@ -59,10 +55,6 @@ static const struct iwl_family_base_params iwl_bz_base = {
.ucode_api_min = IWL_BZ_UCODE_API_MIN, \
.led_mode = IWL_LED_RF_STATE, \
.non_shared_ant = ANT_B, \
- .dccm_offset = IWL_BZ_DCCM_OFFSET, \
- .dccm_len = IWL_BZ_DCCM_LEN, \
- .dccm2_offset = IWL_BZ_DCCM2_OFFSET, \
- .dccm2_len = IWL_BZ_DCCM2_LEN, \
.smem_offset = IWL_BZ_SMEM_OFFSET, \
.smem_len = IWL_BZ_SMEM_LEN, \
.apmg_not_supported = true, \
@@ -18,10 +18,6 @@
#define IWL_DR_NVM_VERSION 0x0a1d
/* Memory offsets and lengths */
-#define IWL_DR_DCCM_OFFSET 0x800000 /* LMAC1 */
-#define IWL_DR_DCCM_LEN 0x10000 /* LMAC1 */
-#define IWL_DR_DCCM2_OFFSET 0x880000
-#define IWL_DR_DCCM2_LEN 0x8000
#define IWL_DR_SMEM_OFFSET 0x400000
#define IWL_DR_SMEM_LEN 0xD0000
@@ -52,10 +48,6 @@ static const struct iwl_family_base_params iwl_dr_base = {
.ucode_api_min = IWL_DR_UCODE_API_MIN, \
.led_mode = IWL_LED_RF_STATE, \
.non_shared_ant = ANT_B, \
- .dccm_offset = IWL_DR_DCCM_OFFSET, \
- .dccm_len = IWL_DR_DCCM_LEN, \
- .dccm2_offset = IWL_DR_DCCM2_OFFSET, \
- .dccm2_len = IWL_DR_DCCM2_LEN, \
.smem_offset = IWL_DR_SMEM_OFFSET, \
.smem_len = IWL_DR_SMEM_LEN, \
.apmg_not_supported = true, \
@@ -19,10 +19,6 @@
#define IWL_SC_NVM_VERSION 0x0a1d
/* Memory offsets and lengths */
-#define IWL_SC_DCCM_OFFSET 0x800000 /* LMAC1 */
-#define IWL_SC_DCCM_LEN 0x10000 /* LMAC1 */
-#define IWL_SC_DCCM2_OFFSET 0x880000
-#define IWL_SC_DCCM2_LEN 0x8000
#define IWL_SC_SMEM_OFFSET 0x400000
#define IWL_SC_SMEM_LEN 0xD0000
@@ -59,10 +55,6 @@ static const struct iwl_family_base_params iwl_sc_base = {
.ucode_api_min = IWL_SC_UCODE_API_MIN, \
.led_mode = IWL_LED_RF_STATE, \
.non_shared_ant = ANT_B, \
- .dccm_offset = IWL_SC_DCCM_OFFSET, \
- .dccm_len = IWL_SC_DCCM_LEN, \
- .dccm2_offset = IWL_SC_DCCM2_OFFSET, \
- .dccm2_len = IWL_SC_DCCM2_LEN, \
.smem_offset = IWL_SC_SMEM_OFFSET, \
.smem_len = IWL_SC_SMEM_LEN, \
.apmg_not_supported = true, \