@@ -28,7 +28,7 @@ ar9003_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
{
struct ar9003_txc *ads = ds;
int checksum = 0;
- u32 val, ctl12, ctl17;
+ u32 val, ctl12, ctl17, ctl18;
u8 desc_len;
desc_len = ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x18 : 0x17);
@@ -132,8 +132,21 @@ ar9003_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
break;
}
+ ctl18 = set11nRateFlags(i->rates, 0)
+ | set11nRateFlags(i->rates, 1)
+ | set11nRateFlags(i->rates, 2)
+ | set11nRateFlags(i->rates, 3)
+ | SM(i->rtscts_rate, AR_RTSCTSRate);
+
val = (i->flags & ATH9K_TXDESC_PAPRD) >> ATH9K_TXDESC_PAPRD_S;
- ctl12 |= SM(val, AR_PAPRDChainMask);
+
+ if (!AR_SREV_5502(ah)) {
+ ctl12 |= SM(val, AR_PAPRDChainMask);
+ ctl18 |= set11nChainSel(i->rates, 0)
+ | set11nChainSel(i->rates, 1)
+ | set11nChainSel(i->rates, 2)
+ | set11nChainSel(i->rates, 3);
+ }
WRITE_ONCE(ads->ctl12, ctl12);
WRITE_ONCE(ads->ctl17, ctl17);
@@ -144,18 +157,20 @@ ar9003_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
WRITE_ONCE(ads->ctl16, set11nPktDurRTSCTS(i->rates, 2)
| set11nPktDurRTSCTS(i->rates, 3));
- WRITE_ONCE(ads->ctl18,
- set11nRateFlags(i->rates, 0) | set11nChainSel(i->rates, 0)
- | set11nRateFlags(i->rates, 1) | set11nChainSel(i->rates, 1)
- | set11nRateFlags(i->rates, 2) | set11nChainSel(i->rates, 2)
- | set11nRateFlags(i->rates, 3) | set11nChainSel(i->rates, 3)
- | SM(i->rtscts_rate, AR_RTSCTSRate));
+ WRITE_ONCE(ads->ctl18, ctl18);
WRITE_ONCE(ads->ctl19, AR_Not_Sounding);
WRITE_ONCE(ads->ctl20, SM(i->txpower[1], AR_XmitPower1));
WRITE_ONCE(ads->ctl21, SM(i->txpower[2], AR_XmitPower2));
WRITE_ONCE(ads->ctl22, SM(i->txpower[3], AR_XmitPower3));
+
+ if (AR_SREV_5502(ah))
+ WRITE_ONCE(ads->ctl23, set11nChainSelV2(i->rates, 0)
+ | set11nChainSelV2(i->rates, 1)
+ | set11nChainSelV2(i->rates, 2)
+ | set11nChainSelV2(i->rates, 3)
+ | SM(val, AR_PAPRDChainMaskV2));
}
static u16 ar9003_calc_ptr_chksum(struct ar9003_txc *ads)
@@ -357,6 +372,7 @@ static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,
{
struct ar9003_txs *ads;
u32 status;
+ bool tx_ba_status;
ads = &ah->ts_ring[ah->ts_tail];
@@ -390,13 +406,17 @@ static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,
ts->ts_rssi_ctl0 = MS(status, AR_TxRSSIAnt00);
ts->ts_rssi_ctl1 = MS(status, AR_TxRSSIAnt01);
ts->ts_rssi_ctl2 = MS(status, AR_TxRSSIAnt02);
- if (status & AR_TxBaStatus) {
+ if (!AR_SREV_5502(ah))
+ tx_ba_status = (status & AR_TxBaStatus) != 0;
+
+ status = READ_ONCE(ads->status3);
+ if (AR_SREV_5502(ah))
+ tx_ba_status = (status & AR_TxBaStatusV2) != 0;
+ if (tx_ba_status) {
ts->ts_flags |= ATH9K_TX_BA;
ts->ba_low = ads->status5;
ts->ba_high = ads->status6;
}
-
- status = READ_ONCE(ads->status3);
if (status & AR_ExcessiveRetries)
ts->ts_status |= ATH9K_TXERR_XRETRY;
if (status & AR_Filtered)
@@ -41,6 +41,10 @@
#define AR_PAPRDChainMask 0x00000e00
#define AR_PAPRDChainMask_S 9
+/* ctl 23 */
+#define AR_PAPRDChainMaskV2 0x0000f000
+#define AR_PAPRDChainMaskV2_S 16
+
#define MAP_ISR_S2_CST 6
#define MAP_ISR_S2_GTT 6
#define MAP_ISR_S2_TIM 3
@@ -40,6 +40,9 @@
#define set11nChainSel(_series, _index) \
(SM((_series)[_index].ChSel, AR_ChainSel##_index))
+#define set11nChainSelV2(_series, _index) \
+ (SM((_series)[_index].ChSel, AR_ChainSelV2_##_index))
+
#define CCK_SIFS_TIME 10
#define CCK_PREAMBLE_BITS 144
#define CCK_PLCP_BITS 48
@@ -429,18 +432,26 @@ struct ar5416_desc {
#define AR_GI0 0x00000002
#define AR_ChainSel0 0x0000001c
#define AR_ChainSel0_S 2
+#define AR_ChainSelV2_0 0x0000000f
+#define AR_ChainSelV2_0_S 0
#define AR_2040_1 0x00000020
#define AR_GI1 0x00000040
#define AR_ChainSel1 0x00000380
#define AR_ChainSel1_S 7
+#define AR_ChainSelV2_1 0x000000f0
+#define AR_ChainSelV2_1_S 4
#define AR_2040_2 0x00000400
#define AR_GI2 0x00000800
#define AR_ChainSel2 0x00007000
#define AR_ChainSel2_S 12
+#define AR_ChainSelV2_2 0x00000f00
+#define AR_ChainSelV2_2_S 8
#define AR_2040_3 0x00008000
#define AR_GI3 0x00010000
#define AR_ChainSel3 0x000e0000
#define AR_ChainSel3_S 17
+#define AR_ChainSelV2_3 0x0000f000
+#define AR_ChainSelV2_3_S 12
#define AR_RTSCTSRate 0x0ff00000
#define AR_RTSCTSRate_S 20
#define AR_STBC0 0x10000000
@@ -477,6 +488,7 @@ struct ar5416_desc {
#define AR_TxDataUnderrun 0x00020000
#define AR_DescCfgErr 0x00040000
#define AR_TxTimerExpired 0x00080000
+#define AR_TxBaStatusV2 0x00200000
#define AR_TxStatusRsvd10 0xfff00000
#define AR_SendTimestamp ds_txstatus2