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Miller" , Jakub Kicinski , Aviad Brikman , Eliav Farber , Oleksandr Savchenko , Shay Bar , Viktor Barna Subject: [RFC v1 160/256] cl8k: add reg/reg_mac_hw_mu.h Date: Thu, 17 Jun 2021 16:00:47 +0000 Message-Id: <20210617160223.160998-161-viktor.barna@celeno.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210617160223.160998-1-viktor.barna@celeno.com> References: <20210617160223.160998-1-viktor.barna@celeno.com> X-Originating-IP: [62.216.42.54] X-ClientProxiedBy: PR3PR09CA0018.eurprd09.prod.outlook.com (2603:10a6:102:b7::23) To AM9P192MB1412.EURP192.PROD.OUTLOOK.COM (2603:10a6:20b:38b::16) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (62.216.42.54) by PR3PR09CA0018.eurprd09.prod.outlook.com (2603:10a6:102:b7::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4242.18 via Frontend Transport; Thu, 17 Jun 2021 16:05:28 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0ee6aa56-85e9-4722-1f6f-08d931a9ba49 X-MS-TrafficTypeDiagnostic: AM9P192MB1187: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4125; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 019K4zjC3oRGCdXRQOKGUkMSMIlmjslVY27gHTd3yuR4zkmTEA91Z3dEmpyrHlXnJiNUo7L/hLg/TcUU0UwvKML6/3NkG4hZMNf2Y6cM9dfCHI4x/YDL9/lAmYJoBHYkGbeLNuvrNVCW6D+nTh2kaIkg9OGBDPp1Y5UeNJN5VMKPZr1B03xqJvV2eOMSxxrQiCkaBxX1aV0FIA5ETUc8Vh9XHkDXPQ0NCkNwCAv8jm0/8RJxHB5PeXEaQQsCyA9WjOI5BPvwf7opQjUBQ/bhvF7a5YFt+NxBtXf2VJp9nERwUYcdzbO74IusTOJ7fEg5jbcPPH8F4/ej8D9CBxJFA6mAs/i9OloIzYTyCIfYxMa/R2oqlf89wuv3ClBn+bvQNBsgcXfj0AXP5V4vpB9Guzmo1+If1BIyE9JAuZXNi+pyYzpOrPN5b2CJPJ560Wi8tRgk+7mYPi+R3viRBU3+rC0fCozvs6zZH+Ki2Fb38TB9tAewaLslBTeFGToa4DKMrSilEQ8RMGJJ4CUX6dm6hFqm5CEZyaBSp9FtdjdlgFeZHN09ohQbcR3L5jC3eFAj4I1LSFbLrK4A3EGYzvTNWNtXSgFEWhmxgBsfid51mtf0AZ83ph5kzZ5lcpHILoq3QHUB95dJYYQEC1c5nTjXf+kFzQNKmnkTg4AD68geX5YOeYCFn+U0qTq+kjJlPzKc7Vjw+jgB57hNsOo3c1P2mQ== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM9P192MB1412.EURP192.PROD.OUTLOOK.COM; PTR:; CAT:NONE; SFS:(39840400004)(376002)(396003)(136003)(366004)(346002)(6512007)(66946007)(55236004)(66556008)(6506007)(54906003)(8676002)(4326008)(186003)(316002)(66476007)(6486002)(26005)(6916009)(86362001)(36756003)(9686003)(8936002)(6666004)(5660300002)(2616005)(956004)(2906002)(478600001)(52116002)(83380400001)(38350700002)(16526019)(1076003)(38100700002)(107886003)(69590400013)(32563001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: jTriP1CHYTDtatq3d2+gSCYbeJfui6PEtY1seMBuzrpTIuVKKqc00oWcP+mBPmxNq6ywgYEM2OoKuewxn4osCOTpO0lGS2g4UJpWpTSK4ABEVoe2yzKEVZXzXfecQ/kDs7H1uglc6wNp0VcGI5mt8/Ri3WBIdnRcEjTksTIk0iIqkh09KrmWSsb1ZJD8hXh0Zgc7tZdlQDdBeK93uF+UqWC7lWZjITOzTvE79J0ItLRMD325Gv06I+36Amme9Dxfw0V/ob9ofgcfm/dI+7Qi44xqWN2DNE+1EUl+Id11XzdGgzrlk5PavAtzjNYboFCCNBhw9WHDoNItLpKGwCdv636H3KYansoZ63VNiuPqjUgKhSXWUtW+TPnHkhaJ8JS/8FW1tK2WHbpp7RGTNpvPtfJVxbMt7558uq0/+JxEoVxX29OAKoL0/blr3uyjmcHpe+PwnUV8KxprYr7dU1YVYj1Kc0w8YaGALQpHh/Wbfgliz82yGKXusF86bQlvJ87WdkAu7hI7wDv/QRZmmPjJ0tXTat/+kdTRUFsClfWMPpqKZYDzPcr0d2vLfNqgknydp6Ka+18RaeY3JfiRx7sCefHxqTQp7fAXuX9pytDxbQ0mPr7HDFveXod6N15fThOIR8JK6yJqnKRmVNpsZXXsYrqVuFXZnVpYKe3OhO0Sh498RcepHS7F+z1KaSTcupB3cLR/qrfKlmphN2sXL7hIgYKCTJB9zTbO+VAauyxygLkToeX/KIxOJVwyCBA5SBnGqfsCZq452dEqTYB8FcDsmTQbI9DAnaUYAtOsY7pwxMuBFcWpPdtMI9nF+DSwRdPrvYKtIc4PxeAPC54iOC6NPdgQzp7XRsyZGSwc2b2QlyeUy/0ra66Yp/jpDm3mtzXkr1N4unEnbn0Am+mWn8NL2JaAcIDEgJ6I78rNP3M4QxtlbckZOy1/aTJIkiCQ1SGYK2pdaDNSLhZH+TckkCHs/NbP5yO1BWuXQWPKG2SjwLR2/ClrJ66IsxpWiTmYWl5wY/OlbyJiffnIgulHJbx5TKXFv4bXl4yM42XEM3GfXJobiknc9jHsEeaMa7GJ5Ryff1+75Q+dBT8Dp4oSK+04HdBke+7xobn9E/pO/Yl2p+9q1tNuetebS9sFbafznlDeNIM+l4MJ4hYKw72Bd3AxCUfY0z3Kdd12P5g1jbKmBtbDjYssBs3xuX7n7BabNsq1vZ6uWpY0RFZ5P+ceWbgfNz93GeOKLGouJkwbUKUt0fvC2gDCDC6iXxh8jvA2Ew8F2tk8FumVhyACPaMwjp4uJWlgeA64Qaoon/nPP/Enw5VQH2Op/+xvpW4yg+PTmUcf X-OriginatorOrg: celeno.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0ee6aa56-85e9-4722-1f6f-08d931a9ba49 X-MS-Exchange-CrossTenant-AuthSource: AM9P192MB1412.EURP192.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jun 2021 16:05:29.5518 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f313103b-4c9f-4fd3-b5cf-b97f91c4afa8 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: xiSiAsrIzLdfQMWofCsdrDjaBEbiGErN9RotnUP9zN7sW5j86DlfianKMv/gEmZuM39AQW/93qwCvfhAsgasng== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9P192MB1187 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Viktor Barna (Part of the split. Please, take a look at the cover letter for more details). Signed-off-by: Viktor Barna --- .../wireless/celeno/cl8k/reg/reg_mac_hw_mu.h | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 drivers/net/wireless/celeno/cl8k/reg/reg_mac_hw_mu.h -- 2.30.0 diff --git a/drivers/net/wireless/celeno/cl8k/reg/reg_mac_hw_mu.h b/drivers/net/wireless/celeno/cl8k/reg/reg_mac_hw_mu.h new file mode 100644 index 000000000000..45368cfc36d6 --- /dev/null +++ b/drivers/net/wireless/celeno/cl8k/reg/reg_mac_hw_mu.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: MIT */ +/* Copyright(c) 2019-2021, Celeno Communications Ltd. */ + +#ifndef CL_REG_MAC_HW_MU_H +#define CL_REG_MAC_HW_MU_H + +#include +#include "reg/reg_access.h" +#include "hw.h" + +#define MU_ADDR_OFFSET(i) ((i) << 16) + +/* + * @brief MAC_CNTRL_2 register definition + * Contains various settings for controlling the operation of the core. register description + * 
+ *  Bits           Field Name   Reset Value
+ *  -----   ------------------   -----------
+ *   00    SOFT_RESET                0
+ *
+ */ +#define MAC_HW_MU_MAC_CNTRL_2_ADDR (REG_MAC_HW_BASE_ADDR + 0x00008050) +#define MAC_HW_MU_MAC_CNTRL_2_OFFSET 0x00008050 +#define MAC_HW_MU_MAC_CNTRL_2_INDEX 0x00002014 +#define MAC_HW_MU_MAC_CNTRL_2_RESET 0x00000000 + +static inline void mac_hw_mu_mac_cntrl_2_set(struct cl_hw *cl_hw, u32 value, u8 mu_idx) +{ + ASSERT_ERR(mu_idx < cl_hw->max_mu_cnt); + cl_reg_write(cl_hw, (MAC_HW_MU_MAC_CNTRL_2_ADDR + MU_ADDR_OFFSET(mu_idx)), value); +} + +#endif /* CL_REG_MAC_HW_MU_H */