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Miller" , Jakub Kicinski , Aviad Brikman , Eliav Farber , Oleksandr Savchenko , Shay Bar , Viktor Barna Subject: [RFC v1 144/256] cl8k: add rate_ctrl.h Date: Thu, 17 Jun 2021 16:00:31 +0000 Message-Id: <20210617160223.160998-145-viktor.barna@celeno.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210617160223.160998-1-viktor.barna@celeno.com> References: <20210617160223.160998-1-viktor.barna@celeno.com> X-Originating-IP: [62.216.42.54] X-ClientProxiedBy: PR3PR09CA0018.eurprd09.prod.outlook.com (2603:10a6:102:b7::23) To AM9P192MB1412.EURP192.PROD.OUTLOOK.COM (2603:10a6:20b:38b::16) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (62.216.42.54) by PR3PR09CA0018.eurprd09.prod.outlook.com (2603:10a6:102:b7::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4242.18 via Frontend Transport; Thu, 17 Jun 2021 16:05:12 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 9002c221-fa6e-4717-66f8-08d931a9b074 X-MS-TrafficTypeDiagnostic: AM8P192MB1059: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2089; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: eTcUQNCO/2T1lefR+4NIjVIWUCt6kxvN0yh3t5EhvMDrsN9hRrK/5f2CQ8uZ77LzbzsbJ8fR1Sw1Z4MvnzF8SMAq6v4Lwkk+jW5pZph//qnOTXQ0chaDOnSxYInpHbMvFzb1SRnarG7z84h6dR9hpSe6HOmjNsDoTCNL5Bx/DEc+te/Od1XamXxiFk4hfzrCH0Qq0Ws5Gn/f8LtTS4i/MmfaDNXUYb+ZfKJLRyHkpb0n7uH25fmb0BjPBa4tGhvBS1IBSst3iZOhpkGAxCMgQZ+uNjqOhfppfsD+qsgKycmvpJGBKx0/t0Evn7IQaXew2O1AK8stZrMkmo30S2Q/CXpQgW8aXqQoWMqKimPcf617kVfVDpclG+XsGAM3rl16CrJNTJme2UmwQ1VrI7ry/7cT65cFBp5aWM8fZr6zqXAtsdXexP7klkDFXIIayrdUm2WoJQ0j+lwhdCdQuXhnHTW3cyYRvwQxRXVdsIlns3musCyjZcPSJtbQpXk6kjigInuHB0y6gghrxm3naXFcASNeQWexzz34ukWeB25ieH2wPrUv04hRvds15T8YE/x2UpI4hnYY537gfnTI+W+Cpalw0s8HnjQ/usLF636JP/xilP2zPNqLkKwPNxqyIvjVL0v4CTn6APBE2DQLAUIK8hv2FYEjxh6sTTSHHPtOTPIBzWct7/w5e5jJXt10SExZBHFf64btKIW7pGQEvKid2w== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM9P192MB1412.EURP192.PROD.OUTLOOK.COM; PTR:; CAT:NONE; SFS:(39840400004)(346002)(136003)(376002)(396003)(366004)(26005)(956004)(478600001)(186003)(66556008)(16526019)(107886003)(66946007)(66476007)(8936002)(6916009)(2616005)(1076003)(2906002)(54906003)(6506007)(6666004)(4326008)(38100700002)(38350700002)(83380400001)(9686003)(6512007)(5660300002)(6486002)(86362001)(316002)(55236004)(36756003)(52116002)(8676002)(69590400013)(32563001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: I/k3RROWX/P9DbTp/qlIMbdU1x+KFjCVuC8FRobLokfrdsBXa5n7PsEy5ZbMFGVdFeRa+wgNcyP48vnZtjKBlUPNhwhiVNl+YjKpKZX8cdJai05I0YYU9P8hAmJg6Bk9v41v8VEIs5ozx2nNhtZDUwk1ExBcGDhuC4kGWg1gbKGm5M+9iDrvU3CLXN/Xg/d8PfXYaf9FLiLuaSlDEY+eRd/wBrfojECPS0imlcZnl5G2qi9x9PDAGsDjlaq5GO/rjtG8nGTNolc00mLNFG7nqtqK8r378oC/wK1nyHEw5QHEmkCULYCH7YRNPNo45kIBCmhLHWebzp9H+YhSrxox2XTVU5aI2gKUBB1MCLek+9CsMAkBA3LhnzuYSOtKtE7VSvvuSGvww6UBISp8FCe3DxX6HwXjPsumcmVbo+1HjSow4LhQSUnoVguG2A2zZMrCyQDKTIT5B3Terv1DljdV5rGGYp3eMJQo6Wude5y4Yzbh+PWfNzVm/afjfztr+vgowvOpsWyFJWBBrRVlGYNwqqNLKytng5qttxKc41HBhMLAlhC4TkV9PV+JdXPzA6036TLjqrj4qSYjvMyqxS2T6er3lRoYtglUAkXwbQJAlcxzwmqz3o2fcflFyPGQNd5pIoQniaEEeFLCxLn9+AXOQ/rkpu4fXbeHAAt1uIaXiDyoVamDwrmkWVaZV9wu+wkwS07WzhQSZAb/QlRnELfQbHEsKNMttB0cD7106ySbsZvhlZxLVE5VfTv/C6vs4KCauPGzPQLmIaAoU2cc/N9DLmumcif/hU/x69cfbdxl7gAageyZpEykvyb+xiHj7mzcsgPYdVhSiDKt/73xJ7/etMm2BpKdzeLwhVH0MOscCz5dMRM3KUY20oTfpsYkUkb2scqzw0BQQyo3dgEiJbYJxAD5fm3XZItw/moYtygC2YVES7uQh7drjI01gx0pPm42GUMVvhpPukQ5GQECVc3VGe26sTzIlGeRQnpnJzTx7Go/DoPP7h4KWRZOvTBJsjZcYIEd8Ry58nOfcY6YCCNAajJxk5OI1Mvj4I/qI0tjugdbDEHCXI8kgBv/ubjvTcLrCsxJci/AI/bucKStIXV6VSHml3s6fVkl6/yAVHyYdjhujKV5QjnVksohVRxGLQKOu4vDyXLIEB862ROKiw7bJ/gWnkeMArqLwGJ7WrkjgkZtSXXFVSCCxEew9T257csOn/ubBFvmp2ClTBqDJtnFpv+22b2+OLII0onkO/Bk/gbDjAqLRPEgVVLEExPN3szdtBvMtI8/QXB1AAqxXKbB3e0+LsQcFWG+wowHSors41oUJWZ/8GGs/DvuV8CPjK2R X-OriginatorOrg: celeno.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9002c221-fa6e-4717-66f8-08d931a9b074 X-MS-Exchange-CrossTenant-AuthSource: AM9P192MB1412.EURP192.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jun 2021 16:05:13.1080 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f313103b-4c9f-4fd3-b5cf-b97f91c4afa8 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: QjhtBBgECnR81xc5wmO2Zfx2/9B+sPM3p7BikxlxhsBYcJzlkWOGkSYIPa/BlBEZonNx3sCF0i3Dl1/jrU7aSg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8P192MB1059 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Viktor Barna (Part of the split. Please, take a look at the cover letter for more details). Signed-off-by: Viktor Barna --- drivers/net/wireless/celeno/cl8k/rate_ctrl.h | 106 +++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 drivers/net/wireless/celeno/cl8k/rate_ctrl.h -- 2.30.0 diff --git a/drivers/net/wireless/celeno/cl8k/rate_ctrl.h b/drivers/net/wireless/celeno/cl8k/rate_ctrl.h new file mode 100644 index 000000000000..181f6e31ca00 --- /dev/null +++ b/drivers/net/wireless/celeno/cl8k/rate_ctrl.h @@ -0,0 +1,106 @@ +/* SPDX-License-Identifier: MIT */ +/* Copyright(c) 2019-2021, Celeno Communications Ltd. */ + +#ifndef CL_RATE_CTRL_H +#define CL_RATE_CTRL_H + +#include +#include "ipc_shared.h" + +#define RATE_CTRL_OFFSET_OFDM 4 +#define RATE_CNTRL_HE_SPATIAL_CONF_DEF 0xF + +/* Op_mode field in mm_update_rate_dl_req structure */ +enum cl_op_mode { + RATE_OP_MODE_FIXED, + RATE_OP_MODE_DEFAULT_HE, + RATE_OP_MODE_DEFAULT_OFDM, + RATE_OP_MODE_DEFAULT_CCK, + RATE_OP_MODE_STA_SU, + RATE_OP_MODE_STA_MU, + RATE_OP_MODE_MCAST, + RATE_OP_MODE_BCAST +}; + +/* Value to be set in tx_host_info */ +enum cl_rate_ctrl_entry { + RATE_CTRL_ENTRY_NA = 0, + + RATE_CTRL_ENTRY_STA, + RATE_CTRL_ENTRY_FIXED_RATE, + RATE_CTRL_ENTRY_MIN_HE, + RATE_CTRL_ENTRY_MIN_OFDM, + RATE_CTRL_ENTRY_MIN_CCK, + RATE_CTRL_ENTRY_MCAST, + RATE_CTRL_ENTRY_BCAST, + + /* Entry size in firmware is represented by 3 bits */ + RATE_CTRL_ENTRY_MAX = 8 +}; + +/* + * sw_ctrl includes eights bits (16 - 23) to be used by software. + * Bit 16 is used by driver to indicate tx_bf. + * Bit 17 is used by driver to indicate fallback. + * Bit 18 - 23 are still free. + */ +struct cl_rate_ctrl_info_fields { + u32 mcs_index : 7; /* [6:0] */ + u32 bw : 2; /* [8:7] */ + u32 gi : 2; /* [10:9] */ + u32 pre_type_or_stbc : 1; /* [11] */ + u32 format_mod : 4; /* [15:12] */ + u32 tx_bf : 1; /* [16] */ + u32 fallback : 1; /* [17] */ + u32 sw_ctrl : 6; /* [23:18] */ + u32 tx_chains : 8; /* [31:24] */ +}; + +union cl_rate_ctrl_info { + struct cl_rate_ctrl_info_fields field; + u32 word; +}; + +struct cl_rate_ctrl_info_he_fields { + u32 spatial_conf : 4; /* [3:0] */ + u32 starting_sts : 3; /* [6:4] */ + u32 ru_index : 6; /* [12:7] */ + u32 ru_type : 3; /* [15:13] */ + u32 ru_band : 1; /* [16] */ + u32 mu_usr_pos : 2; /* [18:17] */ + u32 dcm_data : 1; /* [19] */ + u32 num_usrs_mu_dl : 4; /* [23:20] */ + u32 ru_alloc : 8; /* [31:24] */ +}; + +union cl_rate_ctrl_info_he { + struct cl_rate_ctrl_info_he_fields field; + u32 word; +}; + +struct cl_hw; +struct cl_sta; +struct cl_sw_txhdr; + +u32 cl_rate_ctrl_generate(struct cl_hw *cl_hw, struct cl_sta *cl_sta, + u8 mode, u8 bw, u8 nss, u8 mcs, u8 gi, + bool fallback_en); +void cl_rate_ctrl_convert(union cl_rate_ctrl_info *rate_ctrl_info); +void cl_rate_ctrl_parse(union cl_rate_ctrl_info *rate_ctrl_info, u8 *nss, u8 *mcs); + +void cl_rate_ctrl_set_default(struct cl_hw *cl_hw); + +void cl_rate_ctrl_set_default_per_he_minrate(struct cl_hw *cl_hw, u8 bw, + u8 nss, u8 mcs, u8 gi); +bool cl_rate_ctrl_set_mcast(struct cl_hw *cl_hw, u8 mode, u8 mcs); +bool cl_rate_ctrl_set_fixed(struct cl_hw *cl_hw, u32 rate_ctrl_he, u8 mode, u8 mcs, u8 nss, + u8 bw, u8 gi, u8 ltf_field); +bool cl_rate_ctrl_set_dbgfs(struct cl_hw *cl_hw, u8 sta_idx, u32 rate_ctrl, u32 rate_ctrl_he, + u8 op_mode, u8 bw, u8 ltf_field); +void cl_rate_ctrl_set_ate_agg(struct cl_hw *cl_hw, struct cl_sta *cl_sta); + +void cl_rate_ctrl_update_desc_single(struct cl_hw *cl_hw, struct tx_host_info *info, + struct cl_sw_txhdr *sw_txhdr); +void cl_rate_ctrl_update_desc_agg(struct cl_hw *cl_hw, struct tx_host_info *info); + +#endif /* CL_RATE_CTRL_H */