From patchwork Sat Jan 14 04:56:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deren Wu X-Patchwork-Id: 643105 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D045FC3DA78 for ; Sat, 14 Jan 2023 04:57:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229468AbjANE5U (ORCPT ); Fri, 13 Jan 2023 23:57:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229461AbjANE5R (ORCPT ); Fri, 13 Jan 2023 23:57:17 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43F4935AC for ; Fri, 13 Jan 2023 20:57:12 -0800 (PST) X-UUID: e3ac375293c711ed945fc101203acc17-20230114 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=3q8eUrFQGCvox/fCQJWQXBx4k/sv4dLG8kGb0Zo/4+Q=; b=Up0mH1Zwf+c+0EcNO6N2xtbU4tdlYqaaiMRv2V9n6WavO2IV7Q+6C1uOLJpGDPzkqSOumW1DGLc97uC8d64qWSeuZVlh6/ZAWxi17KYAzu9oZzy7Rwj3T5othniMLGzbPssFTphxTzJtl7QeZImraeq/RSWpIantBhfSQ4jM34Q=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.17, REQID:df60f65a-1add-4ac5-9922-77f67b415d21, IP:0, U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:543e81c, CLOUDID:660a3a8c-8530-4eff-9f77-222cf6e2895b, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0 X-CID-BVR: 0,NGT X-UUID: e3ac375293c711ed945fc101203acc17-20230114 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1340597885; Sat, 14 Jan 2023 12:57:04 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Sat, 14 Jan 2023 12:57:03 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Sat, 14 Jan 2023 12:57:03 +0800 From: Deren Wu To: Felix Fietkau , Lorenzo Bianconi CC: Sean Wang , Soul Huang , YN Chen , Leon Yen , Eric-SY Chang , Deren Wu , KM Lin , Robin Chiu , CH Yeh , Posh Sun , Stella Chang , Evelyn Tsai , Ryder Lee , Shayne Chen , linux-wireless , linux-mediatek , Deren Wu Subject: [PATCH 2/2] wifi: mt76: mt7921: reduce polling time in pmctrl Date: Sat, 14 Jan 2023 12:56:47 +0800 Message-ID: <09ec100ccffd791acba8ad0521e486e309ff4644.1673670759.git.deren.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <4113f5787a4e15271698219c61367d5105109c92.1673670759.git.deren.wu@mediatek.com> References: <4113f5787a4e15271698219c61367d5105109c92.1673670759.git.deren.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Due to the polling tick is 10ms, the wake up flow in the status waiting would cause more 10~20ms than the real HW response time. Reduce tick-interval from 10ms to 1ms to get better network performance, such as ping latency, in low power mode. Reviewed-by: Lorenzo Bianconi Signed-off-by: Deren Wu --- drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c b/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c index 86340d3205c5..288caa728afc 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c @@ -69,8 +69,8 @@ int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) { mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_CLR_OWN); - if (mt76_poll_msec(dev, MT_CONN_ON_LPCTL, - PCIE_LPCR_HOST_OWN_SYNC, 0, 50)) + if (mt76_poll_msec_tick(dev, MT_CONN_ON_LPCTL, + PCIE_LPCR_HOST_OWN_SYNC, 0, 50, 1)) break; } @@ -110,8 +110,8 @@ int mt7921e_mcu_fw_pmctrl(struct mt7921_dev *dev) for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) { mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_SET_OWN); - if (mt76_poll_msec(dev, MT_CONN_ON_LPCTL, - PCIE_LPCR_HOST_OWN_SYNC, 4, 50)) + if (mt76_poll_msec_tick(dev, MT_CONN_ON_LPCTL, + PCIE_LPCR_HOST_OWN_SYNC, 4, 50, 1)) break; }