| Message ID | 1642337235-8618-1-git-send-email-quic_mpubbise@quicinc.com |
|---|---|
| Headers | show |
| Series | add support for WCN6750 | expand |
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> writes: > WCN6750 is non-DBS 2x2 11AX chipset. Unlike QCA6390/WCN6855 which > are DBS (dual band simultaneous) solutions (2 LMACs), WCN6750 has a > single LMAC supporting 2G, 5G and 6G bands. It can be operated only > on one band at any given point. > > WCN6750 is a PCIe device. Unlike other supported ATH11K PCIe devices > which are directly attached to APSS (Application Processor SubSystem), > WCN6750 is not attached to APSS, it is attached to the WPSS > (Wireless Processor SubSystem) Q6 processor, the FW which runs on the > Q6 processor will enumerate the PCIe device. Since APSS is unaware of > such a device, it has to be registered as a platform device(AHB) to the > kernel for device probing. Like other AHB devices, remoteproc APIs are > used to boot up or shutdown of WCN6750. > > WCN6750 uses both AHB and PCIe ATH11K APIs for it's operation. > It uses AHB APIs for device probe and booting of the remote processor. > Once device is booted up, it uses ATH11K PCIe APIs for initialization > and register access. Hence, it is referred as hybrid bus device in > the rest of this series. > > Since the chip is enumerated by WPSS Q6, device information like > BAR and BAR size is not known to the APSS processor. A new QMI message > called device info QMI request will be sent to the target for fetching > these details. > > STA and AP modes are supported; Basic connectivity and ping are > verified in both the modes. > > Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1 > Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1 > Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1 > Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1 > > Note: > * Remoteproc driver changes for WCN6750 which takes care of > downloading the FW and booting of Q6 processor are under > upstream review. > Link: https://patchwork.kernel.org/project/linux-remoteproc/list/?series=582475 This is a very good overview, thanks for that. But I think something which is not clearly mentioned here is that this only works on Qualcomm Snapdragon SoC, right? So even though WCN6750 is a PCI device, it cannot be attached to any platform. It would be good to emphasise that. > Manikanta Pubbisetty (19): > ath11k: PCI changes to support WCN6750 > ath11k: Refactor PCI code to support hybrid bus devices > ath11k: Choose MSI config based on HW revision > ath11k: Refactor MSI logic > ath11k: Remove core PCI references from PCI common code > ath11k: Add HW params for WCN6750 > ath11k: Add bus params for WCN6750 > ath11k: Add register access logic for WCN6750 > ath11k: Fetch device information via QMI for WCN6750 > ath11k: Add QMI changes for WCN6750 > ath11k: HAL changes to support WCN6750 > ath11k: Datapath changes to support WCN6750 > ath11k: Fix RX de-fragmentation issue on WCN6750 > ath11k: Do not put HW in DBS mode for WCN6750 > ath11k: WMI changes to support WCN6750 > ath11k: Update WBM idle ring HP after FW mode on > ath11k: Add support for WCN6750 device > ath11k: Add support for targets without trustzone > dt: bindings: net: add bindings of WCN6750 for ath11k 19 patches is a lot to chew on in one go, my recommendation is to have max 10-12 patches per set. In this case having three patchsets would make it a lot easier for reviewers, but not sure how to split them. Maybe you could submit these patches separate for preparing WCN6750 support, after a quick look they seem pretty independent: ath11k: Fetch device information via QMI for WCN6750 ath11k: HAL changes to support WCN6750 ath11k: Fix RX de-fragmentation issue on WCN6750 ath11k: Do not put HW in DBS mode for WCN6750 ath11k: WMI changes to support WCN6750
On 1/28/2022 3:37 PM, Kalle Valo wrote: > Manikanta Pubbisetty <quic_mpubbise@quicinc.com> writes: > >> WCN6750 is non-DBS 2x2 11AX chipset. Unlike QCA6390/WCN6855 which >> are DBS (dual band simultaneous) solutions (2 LMACs), WCN6750 has a >> single LMAC supporting 2G, 5G and 6G bands. It can be operated only >> on one band at any given point. >> >> WCN6750 is a PCIe device. Unlike other supported ATH11K PCIe devices >> which are directly attached to APSS (Application Processor SubSystem), >> WCN6750 is not attached to APSS, it is attached to the WPSS >> (Wireless Processor SubSystem) Q6 processor, the FW which runs on the >> Q6 processor will enumerate the PCIe device. Since APSS is unaware of >> such a device, it has to be registered as a platform device(AHB) to the >> kernel for device probing. Like other AHB devices, remoteproc APIs are >> used to boot up or shutdown of WCN6750. >> >> WCN6750 uses both AHB and PCIe ATH11K APIs for it's operation. >> It uses AHB APIs for device probe and booting of the remote processor. >> Once device is booted up, it uses ATH11K PCIe APIs for initialization >> and register access. Hence, it is referred as hybrid bus device in >> the rest of this series. >> >> Since the chip is enumerated by WPSS Q6, device information like >> BAR and BAR size is not known to the APSS processor. A new QMI message >> called device info QMI request will be sent to the target for fetching >> these details. >> >> STA and AP modes are supported; Basic connectivity and ping are >> verified in both the modes. >> >> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1 >> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1 >> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1 >> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1 >> >> Note: >> * Remoteproc driver changes for WCN6750 which takes care of >> downloading the FW and booting of Q6 processor are under >> upstream review. >> Link: https://patchwork.kernel.org/project/linux-remoteproc/list/?series=582475 > This is a very good overview, thanks for that. But I think something > which is not clearly mentioned here is that this only works on Qualcomm > Snapdragon SoC, right? You are absolutely right. > So even though WCN6750 is a PCI device, it cannot > be attached to any platform. It would be good to emphasise that. I'll add this detail in the next revision. >> Manikanta Pubbisetty (19): >> ath11k: PCI changes to support WCN6750 >> ath11k: Refactor PCI code to support hybrid bus devices >> ath11k: Choose MSI config based on HW revision >> ath11k: Refactor MSI logic >> ath11k: Remove core PCI references from PCI common code >> ath11k: Add HW params for WCN6750 >> ath11k: Add bus params for WCN6750 >> ath11k: Add register access logic for WCN6750 >> ath11k: Fetch device information via QMI for WCN6750 >> ath11k: Add QMI changes for WCN6750 >> ath11k: HAL changes to support WCN6750 >> ath11k: Datapath changes to support WCN6750 >> ath11k: Fix RX de-fragmentation issue on WCN6750 >> ath11k: Do not put HW in DBS mode for WCN6750 >> ath11k: WMI changes to support WCN6750 >> ath11k: Update WBM idle ring HP after FW mode on >> ath11k: Add support for WCN6750 device >> ath11k: Add support for targets without trustzone >> dt: bindings: net: add bindings of WCN6750 for ath11k > 19 patches is a lot to chew on in one go, my recommendation is to have > max 10-12 patches per set. > > In this case having three patchsets would make it a lot easier for > reviewers, but not sure how to split them. Maybe you could submit these > patches separate for preparing WCN6750 support, after a quick look they > seem pretty independent: > > ath11k: Fetch device information via QMI for WCN6750 > ath11k: HAL changes to support WCN6750 > ath11k: Fix RX de-fragmentation issue on WCN6750 > ath11k: Do not put HW in DBS mode for WCN6750 > ath11k: WMI changes to support WCN6750 Sure, I'll logically split the series in the next revisions.