From patchwork Wed Nov 6 10:47:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 842657 Received: from mail-4027.protonmail.ch (mail-4027.protonmail.ch [185.70.40.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E5921DE3D4 for ; Wed, 6 Nov 2024 10:47:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.40.27 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730890079; cv=none; b=E8jYgSv5m23JcbkIfVVrVGiVg5/RMT/IaXCgevHC+WgINL16vvwTGBplI5DDtHpCr3tVndGjQFJazXDpVvZkUB5oFfrdxtVqwN3RQ6MAg01fZxpKbi4wkasUsjgiHHPqZKRjy+d6086+gHN79vKTY+wQBFci0XQgtdyclhVHyXo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730890079; c=relaxed/simple; bh=9FbpAsg3o7PfFDuCF41WcBi9lk55h04DLXJFlfqA0BE=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=AUdxDfUwoezjqsC0anm/UPn+caISKAkOuuRxaNXFEHOr0Quann4obPM/e/Q/+Gs8SN1tKFmD1KM3KaKa04CMUV4ah4xeWQCKxsstipO9EE24d1PmUueL9Y1Gaz9eZgb9G9v/pWqESyriL38BhsmeigY2PBHoQWe2x+OIQEu+EEc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com; spf=pass smtp.mailfrom=protonmail.com; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b=sxsclCJe; arc=none smtp.client-ip=185.70.40.27 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=protonmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b="sxsclCJe" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1730890075; x=1731149275; bh=9FbpAsg3o7PfFDuCF41WcBi9lk55h04DLXJFlfqA0BE=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=sxsclCJegFRL6x4xkC5mrgqX0ejLFv9tv7vLYtkBjZsBQNV2k8rc9Pg5LVlrCRPgP DMXkRIRLPirrQLw/MPoOBmR+xZiB8tNRGNkedeb2pElaKarIF6e0fMY6PlpFf6tuxj c5ACyhW7/v50RhFxlekVQskzsOQwo+vFlHoKalmyiVDAqKX6vBH3TdD3ww9QIhVOoM YlwiYEBPPB8bTLZ14feBfTjDJsQHglLtVIKm1SXl/mbgGjd7vRWuwefqdjd5TKpqOF MHLqMadkPLWCzQvrKogK/5DqHb+fFPWzGWyATb2VROJtzFabLg6lPQK/6Unh689xgD QsczlP9DlXxcw== Date: Wed, 06 Nov 2024 10:47:51 +0000 To: Wim Van Sebroeck , Guenter Roeck , Matthias Brugger , AngeloGioacchino Del Regno From: Yassine Oudjana Cc: Yassine Oudjana , linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 1/2] watchdog: mediatek: Fix mtk_wdt_restart Message-ID: <20241106104738.195968-2-y.oudjana@protonmail.com> In-Reply-To: <20241106104738.195968-1-y.oudjana@protonmail.com> References: <20241106104738.195968-1-y.oudjana@protonmail.com> Feedback-ID: 6882736:user:proton X-Pm-Message-ID: 2270a8af62230626aa0eba89eb49248f2a8f9a91 Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Clear the IRQ enable bit of WDT_MODE before asserting software reset in order to make TOPRGU issue a system reset signal instead of an IRQ. Fixes: a44a45536f7b ("watchdog: Add driver for Mediatek watchdog") Signed-off-by: Yassine Oudjana --- drivers/watchdog/mtk_wdt.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c index c35f85ce8d69c..e2d7a57d6ea2e 100644 --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c @@ -225,9 +225,15 @@ static int mtk_wdt_restart(struct watchdog_device *wdt_dev, { struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev); void __iomem *wdt_base; + u32 reg; wdt_base = mtk_wdt->wdt_base; + /* Enable reset in order to issue a system reset instead of an IRQ */ + reg = readl(wdt_base + WDT_MODE); + reg &= ~WDT_MODE_IRQ_EN; + writel(reg | WDT_MODE_KEY, wdt_base + WDT_MODE); + while (1) { writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST); mdelay(5);