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[1.34.21.66]) by smtp.gmail.com with ESMTPSA id l27-20020a635b5b000000b005dcbb855530sm7658404pgm.76.2024.03.26.08.00.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 08:00:41 -0700 (PDT) From: Peter Yin To: patrick@stwcx.xyz, Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/4] ARM: dts: aspeed: Add the AST2600 WDT with SCU register Date: Tue, 26 Mar 2024 23:00:25 +0800 Message-Id: <20240326150027.3015958-3-peteryin.openbmc@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240326150027.3015958-1-peteryin.openbmc@gmail.com> References: <20240326150027.3015958-1-peteryin.openbmc@gmail.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The AST2600 Watchdog Timer (WDT) references the System Control Unit (SCU) register for its operation. Signed-off-by: Peter Yin --- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi index 5f640b7d6b6d..2f7788f2f153 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -558,23 +558,27 @@ uart5: serial@1e784000 { wdt1: watchdog@1e785000 { compatible = "aspeed,ast2600-wdt"; reg = <0x1e785000 0x40>; + aspeed,scu = <&syscon>; }; wdt2: watchdog@1e785040 { compatible = "aspeed,ast2600-wdt"; reg = <0x1e785040 0x40>; + aspeed,scu = <&syscon>; status = "disabled"; }; wdt3: watchdog@1e785080 { compatible = "aspeed,ast2600-wdt"; reg = <0x1e785080 0x40>; + aspeed,scu = <&syscon>; status = "disabled"; }; wdt4: watchdog@1e7850c0 { compatible = "aspeed,ast2600-wdt"; reg = <0x1e7850C0 0x40>; + aspeed,scu = <&syscon>; status = "disabled"; };