From patchwork Tue Nov 8 03:32:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 622895 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9C18C4321E for ; Tue, 8 Nov 2022 03:32:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232800AbiKHDc0 (ORCPT ); Mon, 7 Nov 2022 22:32:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232547AbiKHDcX (ORCPT ); Mon, 7 Nov 2022 22:32:23 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A1E32F38D; Mon, 7 Nov 2022 19:32:17 -0800 (PST) X-UUID: b1caf2239d7d4864b4e403b9b01800b7-20221108 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=cyUvGxY4Wu98m1LncPnnl8Hq6Znl/5H8+fOEMNjgd2E=; b=quT3NMaw0kf2IXnqRTUdLIfyOWf0kNwEvWS7uZQxZMnyOYP9Kfu4M21beRCFS/i6z2M8p/FkF1yNpDk/Tnm/LuMSLTRyzy0zMRXsHZpgR7lkuDNqaY24Phr+m6ogNwXlOxOXP8CJQOm7iroGujxa+awe31C4FZ3YrhK/SwjEFAI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.12, REQID:cd740aca-007c-4db7-bf74-1170b1cf80a1, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:62cd327, CLOUDID:c982bdeb-84ac-4628-a416-bc50d5503da6, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: b1caf2239d7d4864b4e403b9b01800b7-20221108 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1350509886; Tue, 08 Nov 2022 11:32:12 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 8 Nov 2022 11:32:11 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 8 Nov 2022 11:32:11 +0800 From: Allen-KH Cheng To: Wim Van Sebroeck , Guenter Roeck , Krzysztof Kozlowski , Matthias Brugger , Rob Herring CC: , , , , , , , , Allen-KH Cheng Subject: [PATCH v5 1/7] arm64: dts: mediatek: mt8186: Fix watchdog compatible Date: Tue, 8 Nov 2022 11:32:03 +0800 Message-ID: <20221108033209.22751-2-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221108033209.22751-1-allen-kh.cheng@mediatek.com> References: <20221108033209.22751-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org From: AngeloGioacchino Del Regno MT8186's watchdog embeds a reset controller and needs only the mediatek,mt8186-wdt compatible string as the MT6589 one is there for watchdogs that don't have any reset controller capability. Fixes: 2e78620b1350 ("arm64: dts: Add MediaTek MT8186 dts and evaluation board and Makefile") Signed-off-by: AngeloGioacchino Del Regno Co-developed-by: Allen-KH Cheng Signed-off-by: Allen-KH Cheng Reviewed-by: Nícolas F. R. A. Prado --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index 64693c17af9e..e4366144cca5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -330,8 +330,7 @@ }; watchdog: watchdog@10007000 { - compatible = "mediatek,mt8186-wdt", - "mediatek,mt6589-wdt"; + compatible = "mediatek,mt8186-wdt"; mediatek,disable-extrst; reg = <0 0x10007000 0 0x1000>; #reset-cells = <1>;