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Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Wim Van Sebroeck , Guenter Roeck , Sascha Hauer , NXP Linux Team , Abel Vesa , Viorel Suman , Oliver Graute , Peng Fan , Liu Ying , Shijie Qin , Ming Qian , Mirela Rabulea , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-input@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-pm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Viorel Suman Subject: [PATCH v8 02/15] dt-bindings: pinctrl: imx: Add fsl,scu-iomux yaml file Date: Thu, 7 Jul 2022 15:50:09 +0300 Message-Id: <20220707125022.1156498-3-viorel.suman@oss.nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220707125022.1156498-1-viorel.suman@oss.nxp.com> References: <20220707125022.1156498-1-viorel.suman@oss.nxp.com> X-ClientProxiedBy: AM9P192CA0026.EURP192.PROD.OUTLOOK.COM (2603:10a6:20b:21d::31) To VI1PR04MB5005.eurprd04.prod.outlook.com (2603:10a6:803:57::30) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6491fb95-6042-4f38-318c-08da60175651 X-MS-TrafficTypeDiagnostic: AM0PR04MB6418:EE_ X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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This patch documents separately the 'iomux/pinctrl' child node of the SCU main node. Signed-off-by: Abel Vesa Signed-off-by: Viorel Suman Reviewed-by: Krzysztof Kozlowski Acked-by: Linus Walleij --- .../bindings/arm/freescale/fsl,scu.txt | 40 ---------- .../bindings/pinctrl/fsl,scu-pinctrl.yaml | 74 +++++++++++++++++++ 2 files changed, 74 insertions(+), 40 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt index ef7f5222ac48..5ec2a031194e 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt @@ -79,33 +79,7 @@ Required properties: See detailed Resource ID list from: include/dt-bindings/firmware/imx/rsrc.h -Pinctrl bindings based on SCU Message Protocol ------------------------------------------------------------- - -This binding uses the i.MX common pinctrl binding[3]. - -Required properties: -- compatible: Should be one of: - "fsl,imx8qm-iomuxc", - "fsl,imx8qxp-iomuxc", - "fsl,imx8dxl-iomuxc". - -Required properties for Pinctrl sub nodes: -- fsl,pins: Each entry consists of 3 integers which represents - the mux and config setting for one pin. The first 2 - integers are specified using a - PIN_FUNC_ID macro, which can be found in - , - , - . - The last integer CONFIG is the pad setting value like - pull-up on this pin. - - Please refer to i.MX8QXP Reference Manual for detailed - CONFIG settings. - [2] Documentation/devicetree/bindings/power/power-domain.yaml -[3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt RTC bindings based on SCU Message Protocol ------------------------------------------------------------ @@ -184,18 +158,6 @@ firmware { &lsio_mu1 1 3 &lsio_mu1 3 3>; - iomuxc { - compatible = "fsl,imx8qxp-iomuxc"; - - pinctrl_lpuart0: lpuart0grp { - fsl,pins = < - SC_P_UART0_RX_ADMA_UART0_RX 0x06000020 - SC_P_UART0_TX_ADMA_UART0_TX 0x06000020 - >; - }; - ... - }; - ocotp: imx8qx-ocotp { compatible = "fsl,imx8qxp-scu-ocotp"; #address-cells = <1>; @@ -234,7 +196,5 @@ firmware { serial@5a060000 { ... - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lpuart0>; power-domains = <&pd IMX_SC_R_UART_0>; }; diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml new file mode 100644 index 000000000000..45ea565ce238 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX SCU Client Device Node - Pinctrl bindings based on SCU Message Protocol + +maintainers: + - Dong Aisheng + +description: i.MX SCU Client Device Node + Client nodes are maintained as children of the relevant IMX-SCU device node. + This binding uses the i.MX common pinctrl binding. + (Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt) + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - fsl,imx8qm-iomuxc + - fsl,imx8qxp-iomuxc + - fsl,imx8dxl-iomuxc + +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 3 integers and represents the pin ID, the mux value + and pad setting for the pin. The first 2 integers - pin_id and mux_val - are + specified using a PIN_FUNC_ID macro, which can be found in + . The last integer is + the pad setting value like pull-up on this pin. Please refer to the + appropriate i.MX8 Reference Manual for detailed pad CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "pin_id" indicates the pin ID + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied. + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + +additionalProperties: false + +examples: + - | + pinctrl { + compatible = "fsl,imx8qxp-iomuxc"; + + pinctrl_lpuart0: lpuart0grp { + fsl,pins = < + 111 0 0x06000020 + 112 0 0x06000020 + >; + }; + };