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Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Wim Van Sebroeck , Guenter Roeck , Sascha Hauer , NXP Linux Team , Abel Vesa , Viorel Suman , Oliver Graute , Mirela Rabulea , Peng Fan , Liu Ying , Ming Qian , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-input@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-pm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Abel Vesa Subject: [PATCH v5 12/14] arm64: dts: freescale: imx8qxp: Add fallback compatible for clock controller Date: Thu, 16 Jun 2022 19:43:01 +0300 Message-Id: <20220616164303.790379-13-viorel.suman@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220616164303.790379-1-viorel.suman@nxp.com> References: <20220616164303.790379-1-viorel.suman@nxp.com> X-ClientProxiedBy: AM0PR04CA0029.eurprd04.prod.outlook.com (2603:10a6:208:122::42) To VI1PR04MB5005.eurprd04.prod.outlook.com (2603:10a6:803:57::30) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 9c1fc029-83a0-4f97-29cf-08da4fb775b0 X-MS-TrafficTypeDiagnostic: HE1PR0401MB2649:EE_ X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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They rely on the same driver generic part as the i.MX8QXP, so lets add it to i.MX8QXP too, for consitency. Signed-off-by: Abel Vesa Signed-off-by: Viorel Suman --- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index 542bc47509ca..f9c3090c632e 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -216,7 +216,7 @@ pd: power-controller { }; clk: clock-controller { - compatible = "fsl,imx8qxp-clk"; + compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; #clock-cells = <2>; clocks = <&xtal32k &xtal24m>; clock-names = "xtal_32KHz", "xtal_24Mhz";