From patchwork Wed Apr 20 15:01:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hawkins, Nick" X-Patchwork-Id: 564294 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2770C433EF for ; Wed, 20 Apr 2022 15:00:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379916AbiDTPDB (ORCPT ); Wed, 20 Apr 2022 11:03:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379876AbiDTPCz (ORCPT ); Wed, 20 Apr 2022 11:02:55 -0400 Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 513601114B; Wed, 20 Apr 2022 08:00:08 -0700 (PDT) Received: from pps.filterd (m0150244.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 23KAWFGx019131; Wed, 20 Apr 2022 14:59:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=pps0720; bh=LyVX0GKRYwmf9tqKV7M2DFGQ+Tw5m72PfJzpFirLn2I=; b=cVKbBGdAAhuhVp8P9fm08EE3fMabEjcqxPYysl8RukCTggf7K4UDMlS+BNyfzVTgMgkk TRbxX2iItZP+qrPIF3ha/COKVleo6dK/IvLPnJ8lf0Z8K/+p7aN+nTNNyH2LpgqronX4 Uuex6ePsJV8TdtBZBwdQLJ6m/PIk7HON0FH+9zUIXepq7N9aRLL6m3HSdZ58LZf8Hxl4 L70UbWZhTv2XB9eSMjvHnFTu9pyjU5ujH7XofuuvLnc51CK0ziMCZxlq4kO3+5j8ffDz snavjRJ3xzEus9Jq/mya6MtHQSxR2kunCidUk61JrYvpPf3jwNvzfwP+WgXJ/+G2RDpt zQ== Received: from g2t2354.austin.hpe.com (g2t2354.austin.hpe.com [15.233.44.27]) by mx0b-002e3701.pphosted.com (PPS) with ESMTPS id 3fjdc9mc88-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 Apr 2022 14:59:52 +0000 Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2354.austin.hpe.com (Postfix) with ESMTP id BE33283; Wed, 20 Apr 2022 14:59:51 +0000 (UTC) Received: from hpe.com (cigateway-dev.us.rdlabs.hpecorp.net [10.14.73.30]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id 2475336; Wed, 20 Apr 2022 14:59:51 +0000 (UTC) From: nick.hawkins@hpe.com To: verdun@hpe.com, nick@hpe.com, joel@jms.id.au, arnd@arndb.de Cc: Nick Hawkins , Wim Van Sebroeck , Guenter Roeck , linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org Subject: [PATCH v4 03/11] drivers: wdt: Introduce HPE GXP SoC Watchdog Date: Wed, 20 Apr 2022 10:01:47 -0500 Message-Id: <20220420150156.47405-3-nick.hawkins@hpe.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220420150156.47405-1-nick.hawkins@hpe.com> References: <20220420150156.47405-1-nick.hawkins@hpe.com> X-Proofpoint-ORIG-GUID: Q3TwHBsK7ramJwPOYW-gNgzQC7li6SC2 X-Proofpoint-GUID: Q3TwHBsK7ramJwPOYW-gNgzQC7li6SC2 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-04-20_04,2022-04-20_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 impostorscore=0 mlxscore=0 bulkscore=0 lowpriorityscore=0 spamscore=0 clxscore=1015 mlxlogscore=999 adultscore=0 priorityscore=1501 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2204200089 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org From: Nick Hawkins Adding support for the HPE GXP Watchdog. It is new to the linux community and this along with several other patches is the first support for it. The GXP asic contains a full compliment of timers one of which is the watchdog timer. The watchdog timer is 16 bit and has 10ms resolution. The watchdog is now created as a child device of timer since the same register range is used. This was done due to changes requested with the device tree. --- v2: *Made watchdog a child of timer as they share the same register region per change request on dtsi. *Removed extra parenthesis *Fixed u8 u32 u64 usage *Fixed alignment issue *Removed unused gxp_wdt_remove function Signed-off-by: Nick Hawkins --- drivers/watchdog/Kconfig | 8 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/gxp-wdt.c | 166 +++++++++++++++++++++++++++++++++++++ 3 files changed, 175 insertions(+) create mode 100644 drivers/watchdog/gxp-wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index c8fa79da23b3..cb210d2978d2 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -1820,6 +1820,14 @@ config RALINK_WDT help Hardware driver for the Ralink SoC Watchdog Timer. +config GXP_WATCHDOG + tristate "HPE GXP watchdog support" + depends on ARCH_HPE_GXP + select WATCHDOG_CORE + help + Say Y here to include support for the watchdog timer + in HPE GXP SoCs. + config MT7621_WDT tristate "Mediatek SoC watchdog" select WATCHDOG_CORE diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index f7da867e8782..e2acf3a0d0fc 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -92,6 +92,7 @@ obj-$(CONFIG_RTD119X_WATCHDOG) += rtd119x_wdt.o obj-$(CONFIG_SPRD_WATCHDOG) += sprd_wdt.o obj-$(CONFIG_PM8916_WATCHDOG) += pm8916_wdt.o obj-$(CONFIG_ARM_SMC_WATCHDOG) += arm_smc_wdt.o +obj-$(CONFIG_GXP_WATCHDOG) += gxp-wdt.o obj-$(CONFIG_VISCONTI_WATCHDOG) += visconti_wdt.o obj-$(CONFIG_MSC313E_WATCHDOG) += msc313e_wdt.o obj-$(CONFIG_APPLE_WATCHDOG) += apple_wdt.o diff --git a/drivers/watchdog/gxp-wdt.c b/drivers/watchdog/gxp-wdt.c new file mode 100644 index 000000000000..f45ab9a826d6 --- /dev/null +++ b/drivers/watchdog/gxp-wdt.c @@ -0,0 +1,166 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P. */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define MASK_WDGCS_ENABLE 0x01 +#define MASK_WDGCS_RELOAD 0x04 +#define MASK_WDGCS_NMIEN 0x08 +#define MASK_WDGCS_WARN 0x80 + +#define WDT_MAX_TIMEOUT_MS 655000 +#define WDT_DEFAULT_TIMEOUT 30 +#define SECS_TO_WDOG_TICKS(x) ((x) * 100) +#define WDOG_TICKS_TO_SECS(x) ((x) / 100) + +#define GXP_WDT_CNT_OFS 0x10 +#define GXP_WDT_CTRL_OFS 0x16 + +struct gxp_wdt { + void __iomem *base; + struct watchdog_device wdd; +}; + +static void gxp_wdt_enable_reload(struct gxp_wdt *drvdata) +{ + u8 val; + + val = readb(drvdata->base + GXP_WDT_CTRL_OFS); + val |= (MASK_WDGCS_ENABLE | MASK_WDGCS_RELOAD); + writeb(val, drvdata->base + GXP_WDT_CTRL_OFS); +} + +static int gxp_wdt_start(struct watchdog_device *wdd) +{ + struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd); + + writew(SECS_TO_WDOG_TICKS(wdd->timeout), drvdata->base + GXP_WDT_CNT_OFS); + gxp_wdt_enable_reload(drvdata); + return 0; +} + +static int gxp_wdt_stop(struct watchdog_device *wdd) +{ + struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd); + u8 val; + + val = readb_relaxed(drvdata->base + GXP_WDT_CTRL_OFS); + val &= ~MASK_WDGCS_ENABLE; + writeb(val, drvdata->base + GXP_WDT_CTRL_OFS); + return 0; +} + +static int gxp_wdt_set_timeout(struct watchdog_device *wdd, + unsigned int timeout) +{ + struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd); + u32 actual; + + wdd->timeout = timeout; + actual = min(timeout, wdd->max_hw_heartbeat_ms / 1000); + writew(SECS_TO_WDOG_TICKS(actual), drvdata->base + GXP_WDT_CNT_OFS); + + return 0; +} + +static unsigned int gxp_wdt_get_timeleft(struct watchdog_device *wdd) +{ + struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd); + u32 val = readw(drvdata->base + GXP_WDT_CNT_OFS); + + return WDOG_TICKS_TO_SECS(val); +} + +static int gxp_wdt_ping(struct watchdog_device *wdd) +{ + struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd); + + gxp_wdt_enable_reload(drvdata); + return 0; +} + +static int gxp_restart(struct watchdog_device *wdd, unsigned long action, + void *data) +{ + struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd); + + writew(10, drvdata->base + GXP_WDT_CNT_OFS); + gxp_wdt_enable_reload(drvdata); + mdelay(100); + return 0; +} + +static const struct watchdog_ops gxp_wdt_ops = { + .owner = THIS_MODULE, + .start = gxp_wdt_start, + .stop = gxp_wdt_stop, + .ping = gxp_wdt_ping, + .set_timeout = gxp_wdt_set_timeout, + .get_timeleft = gxp_wdt_get_timeleft, + .restart = gxp_restart, +}; + +static const struct watchdog_info gxp_wdt_info = { + .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, + .identity = "HPE GXP Watchdog timer", +}; + +static int gxp_wdt_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct gxp_wdt *drvdata; + int err; + u8 val; + + drvdata = devm_kzalloc(dev, sizeof(struct gxp_wdt), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->base = (void __iomem *)dev->platform_data; + + drvdata->wdd.info = &gxp_wdt_info; + drvdata->wdd.ops = &gxp_wdt_ops; + drvdata->wdd.max_hw_heartbeat_ms = WDT_MAX_TIMEOUT_MS; + drvdata->wdd.parent = dev; + drvdata->wdd.timeout = WDT_DEFAULT_TIMEOUT; + + watchdog_set_drvdata(&drvdata->wdd, drvdata); + watchdog_set_nowayout(&drvdata->wdd, WATCHDOG_NOWAYOUT); + + val = readb(drvdata->base + GXP_WDT_CTRL_OFS); + + if (val & MASK_WDGCS_ENABLE) + set_bit(WDOG_HW_RUNNING, &drvdata->wdd.status); + + watchdog_set_restart_priority(&drvdata->wdd, 128); + + watchdog_stop_on_reboot(&drvdata->wdd); + err = devm_watchdog_register_device(dev, &drvdata->wdd); + if (err) { + dev_err(dev, "Failed to register watchdog device"); + return err; + } + + dev_info(dev, "HPE GXP watchdog timer"); + + return 0; +} + +static struct platform_driver gxp_wdt_driver = { + .probe = gxp_wdt_probe, + .driver = { + .name = "gxp-wdt", + }, +}; +module_platform_driver(gxp_wdt_driver); + +MODULE_AUTHOR("Nick Hawkins "); +MODULE_AUTHOR("Jean-Marie Verdun "); +MODULE_DESCRIPTION("Driver for GXP watchdog timer");