From patchwork Wed Jun 1 10:45:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohit Agarwal X-Patchwork-Id: 578460 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D057BC433EF for ; Wed, 1 Jun 2022 10:46:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352371AbiFAKqx (ORCPT ); Wed, 1 Jun 2022 06:46:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50194 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352288AbiFAKpt (ORCPT ); Wed, 1 Jun 2022 06:45:49 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5209A7E1FF; Wed, 1 Jun 2022 03:45:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654080345; x=1685616345; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=hhRomhvdNZhQE6O0kMFK2TOlx0xN9MXXPxsURdSlbYw=; b=x29szgdnXeccyAqSDGyhkvcqUZcdYzkA5UYkmgINf+bN9EhHYA+shatq PTsSoHwwzRMO/INNn8d6W9JcHtzX+lbXU6tPtA7lHQ7Jen2UFixV3axgJ VTZOeU4UjX6ex1ndivhHpKgJb5/O+smaX86NY2JLp3/BYwa75DlFBy3hU o=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 01 Jun 2022 03:45:45 -0700 X-QCInternal: smtphost Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 01 Jun 2022 03:45:43 -0700 X-QCInternal: smtphost Received: from hu-rohiagar-hyd.qualcomm.com (HELO hu-sgudaval-hyd.qualcomm.com) ([10.213.106.138]) by ironmsg01-blr.qualcomm.com with ESMTP; 01 Jun 2022 16:15:21 +0530 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3970568) id 1EBC53FE4; Wed, 1 Jun 2022 16:15:20 +0530 (+0530) From: Rohit Agarwal To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, wim@linux-watchdog.org, linux@roeck-us.net Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, manivannan.sadhasivam@linaro.org, Rohit Agarwal Subject: [PATCH 03/11] ARM: dts: qcom: sdx65: Add IMEM and PIL info region Date: Wed, 1 Jun 2022 16:15:04 +0530 Message-Id: <1654080312-5408-4-git-send-email-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654080312-5408-1-git-send-email-quic_rohiagar@quicinc.com> References: <1654080312-5408-1-git-send-email-quic_rohiagar@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Add a simple-mfd representing IMEM on SDX65 and define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteproc. Signed-off-by: Rohit Agarwal --- arch/arm/boot/dts/qcom-sdx65.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 669721e..10e3226 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -395,6 +395,19 @@ interrupt-controller; }; + imem@1468f000 { + compatible = "simple-mfd"; + reg = <0x1468f000 0x1000>; + ranges = <0x0 0x1468f000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + pil-reloc@94c { + compatible = "qcom,pil-reloc-info"; + reg = <0x94c 0xc8>; + }; + }; + apps_smmu: iommu@15000000 { compatible = "qcom,sdx65-smmu-500", "arm,mmu-500"; reg = <0x15000000 0x40000>;