From patchwork Tue Aug 17 07:45:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Shih X-Patchwork-Id: 498564 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67513C00143 for ; Tue, 17 Aug 2021 07:46:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4CE6F60F5E for ; Tue, 17 Aug 2021 07:46:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238067AbhHQHqk (ORCPT ); Tue, 17 Aug 2021 03:46:40 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:48458 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S231500AbhHQHqj (ORCPT ); Tue, 17 Aug 2021 03:46:39 -0400 X-UUID: 6cc2d3ce89ac4336b8ee718cb5ae1705-20210817 X-UUID: 6cc2d3ce89ac4336b8ee718cb5ae1705-20210817 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 13340958; Tue, 17 Aug 2021 15:46:03 +0800 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 17 Aug 2021 15:46:02 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Tue, 17 Aug 2021 15:46:01 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 17 Aug 2021 15:46:01 +0800 From: Sam Shih To: Rob Herring , Sean Wang , "Linus Walleij" , Matthias Brugger , Matt Mackall , Herbert Xu , Greg Kroah-Hartman , Wim Van Sebroeck , Guenter Roeck , Michael Turquette , Stephen Boyd , Hsin-Yi Wang , Enric Balletbo i Serra , Fabien Parent , Seiya Wang , , , , , , , , , CC: John Crispin , Ryder Lee , "Sam Shih" Subject: [v2,00/12] Add basic SoC support for mediatek mt7986 Date: Tue, 17 Aug 2021 15:45:45 +0800 Message-ID: <20210817074557.30953-1-sam.shih@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org This patch adds basic SoC support for Mediatek's new 4-core SoC, MT7986, which is mainly for wifi-router application. --- v2: updated mt7986 clock releated IDs, dt-binding, and driver updated mt7986 clock releated dt-binding and driver updated device tree of mt7986a and mt7986b Sam Shih (12): dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC clk: mediatek: add mt7986 clock IDs clk: mediatek: add mt7986 clock support pinctrl: mediatek: moore: check if pin_desc is valid before use dt-bindings: pinctrl: update bindings for MT7986 SoC pinctrl: mediatek: add support for MT7986 SoC dt-bindings: arm64: dts: mediatek: Add mt7986 series dt-bindings: rng: mediatek: add mt7986 to mtk rng binding dt-bindings: serial: Add compatible for Mediatek MT7986 dt-bindings: watchdog: Add compatible for Mediatek MT7986 arm64: dts: mediatek: add mt7986a support arm64: dts: mediatek: add mt7986b support .../devicetree/bindings/arm/mediatek.yaml | 8 + .../arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,ethsys.txt | 1 + .../arm/mediatek/mediatek,infracfg.txt | 1 + .../arm/mediatek/mediatek,sgmiisys.txt | 2 + .../arm/mediatek/mediatek,topckgen.txt | 1 + .../bindings/pinctrl/pinctrl-mt7622.txt | 170 +++ .../devicetree/bindings/rng/mtk-rng.yaml | 1 + .../devicetree/bindings/serial/mtk-uart.txt | 1 + .../devicetree/bindings/watchdog/mtk-wdt.txt | 1 + arch/arm64/boot/dts/mediatek/Makefile | 2 + arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 49 + arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 227 +++ arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 21 + arch/arm64/boot/dts/mediatek/mt7986b.dtsi | 236 ++++ drivers/clk/mediatek/Kconfig | 17 + drivers/clk/mediatek/Makefile | 4 + drivers/clk/mediatek/clk-mt7986-apmixed.c | 78 ++ drivers/clk/mediatek/clk-mt7986-eth.c | 132 ++ drivers/clk/mediatek/clk-mt7986-infracfg.c | 198 +++ drivers/clk/mediatek/clk-mt7986-topckgen.c | 319 +++++ drivers/pinctrl/mediatek/Kconfig | 7 + drivers/pinctrl/mediatek/Makefile | 1 + drivers/pinctrl/mediatek/pinctrl-moore.c | 18 + drivers/pinctrl/mediatek/pinctrl-mt7986.c | 1217 +++++++++++++++++ include/dt-bindings/clock/mt7986-clk.h | 169 +++ 26 files changed, 2882 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a.dtsi create mode 100644 arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt7986b.dtsi create mode 100644 drivers/clk/mediatek/clk-mt7986-apmixed.c create mode 100644 drivers/clk/mediatek/clk-mt7986-eth.c create mode 100644 drivers/clk/mediatek/clk-mt7986-infracfg.c create mode 100644 drivers/clk/mediatek/clk-mt7986-topckgen.c create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt7986.c create mode 100644 include/dt-bindings/clock/mt7986-clk.h