From patchwork Tue Jan 19 10:42:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pho Tran X-Patchwork-Id: 366637 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,PDS_BAD_THREAD_QP_64,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E37E2C433DB for ; Tue, 19 Jan 2021 12:21:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B623022D2A for ; Tue, 19 Jan 2021 12:21:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2392562AbhASMRI (ORCPT ); Tue, 19 Jan 2021 07:17:08 -0500 Received: from mail-bn8nam11on2053.outbound.protection.outlook.com ([40.107.236.53]:3314 "EHLO NAM11-BN8-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2404482AbhASKnW (ORCPT ); Tue, 19 Jan 2021 05:43:22 -0500 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=LNKwCegSWeKo2YTJggRq10GtVUhfv0noCgFecFLvHiuf8YNoH+AHDYlRSn7A3BMOEfFs1hloEKZYD2zpP4yeFNCXrpVhBrFsC+i+8myo2smqg9XKrNAwivWR3uE74PseFiqnVdkH8aBR89VHaUQyFTNmlTJyb61kQICTus5tegDctXQ0nnqS6O6+2e8JV6/Bwv07jEBn2gBr7lUtS7Acy7A/mtnz/6673w7YGq0JZo1R/2LbAIeYUSk8XnrP4BOwkmUnoYMVYcEs/Gl+gA6/CRCclItHtdKECHRfm3do7q0FWEeu6e53YRvpYdSYrCPobeaXb3ZMzSthLN8CSeFZAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=xrlxLo5f9dVS1dJUgEsBIcT64zB2gvcyqLxKOZKD+Yw=; b=Rowa/darKqqlB2f3xXASN3K8SvN+vK+sPbUob9xj4GtoxJGkg+/660XdlWceiGk6GN/ylOFY6oTLr8hDDXxNp5iSzxvwDaFflVm9BCSPUXbppz11Rcpd40dmQtu/dTBrDAB1r5YyiOc/aG5U3n9LBaaA2W6DUZ4liYJum6JfC8dlOSMWr9iob/E9tnq30D5ixXzGbdzwiMZf3jRmqsNjxdNux4H3H31NjPohZcjMFsO3j0vF4TsLd3MKsKEEflL8tOb+AakN+qMwNi1JPLq+To5uXGUVbofSNQ0HduBdBI2zkq6f+aiCQshXK/TZFSVIKjgo2+vNIbj1IcSMva1gFQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=silabs.com; dmarc=pass action=none header.from=silabs.com; dkim=pass header.d=silabs.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=silabs.onmicrosoft.com; s=selector2-silabs-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=xrlxLo5f9dVS1dJUgEsBIcT64zB2gvcyqLxKOZKD+Yw=; b=CVTc368z5FPTqUpIQHfFuV/fY0y3HUiYJLPNtRtUyXxf6Oe19FD27BDmDecVmtSlUmmnVdOwfLbjZNBjvI1rStjLVisB2cHVgLXqHkxa7FTma+Vibjmde/CWFFdfQI73+C4GXAjahZaDBKr1ZLmqpJ8CZkbEw7qqiNiJoMnH0RE= Received: from SJ0PR11MB5008.namprd11.prod.outlook.com (2603:10b6:a03:2d5::17) by BYAPR11MB2806.namprd11.prod.outlook.com (2603:10b6:a02:c7::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3763.10; Tue, 19 Jan 2021 10:42:33 +0000 Received: from SJ0PR11MB5008.namprd11.prod.outlook.com ([fe80::589d:3fe7:733c:eb72]) by SJ0PR11MB5008.namprd11.prod.outlook.com ([fe80::589d:3fe7:733c:eb72%6]) with mapi id 15.20.3763.014; Tue, 19 Jan 2021 10:42:33 +0000 From: Pho Tran To: "gregkh@linuxfoundation.org" , "johan@kernel.org" CC: "linux-kernel@vger.kernel.org" , "linux-usb@vger.kernel.org" , Hung Nguyen , Tung Pham Subject: [PATCH] USB: serial: cp210x: Fix error 32 when hardware flow control is enabled. Thread-Topic: [PATCH] USB: serial: cp210x: Fix error 32 when hardware flow control is enabled. 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The root cause of error 32 is that user application (CoolTerm, linux-serial-test) opened cp210x device with hardware flow control then attempt to control RTS/DTR pins. In hardware flow control, RTS/DTR pins will be controlled by hardware only, any attempt to control those pins will cause error 32 from the device. This fix will block MHS command(command to control RTS/DTR pins) to the device if hardware flow control is being used. Signed-off-by: Pho Tran --- drivers/usb/serial/cp210x.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c index fbb10dfc56e3..3694b7c62290 100644 --- a/drivers/usb/serial/cp210x.c +++ b/drivers/usb/serial/cp210x.c @@ -1211,6 +1211,12 @@ static int cp210x_tiocmset_port(struct usb_serial_port *port, unsigned int set, unsigned int clear) { u16 control = 0; + struct cp210x_flow_ctl flow_ctl; + u32 ctl_hs = 0; + u32 flow_repl = 0; + bool auto_dtr = false; + bool auto_rts = false; + int ret; if (set & TIOCM_RTS) { control |= CONTROL_RTS; @@ -1231,6 +1237,27 @@ static int cp210x_tiocmset_port(struct usb_serial_port *port, dev_dbg(&port->dev, "%s - control = 0x%.4x\n", __func__, control); + // Don't send MHS command if device in hardware flowcontrol mode + ret = cp210x_read_reg_block(port, CP210X_GET_FLOW, &flow_ctl, sizeof(flow_ctl)); + if (ret) + return ret; + + ctl_hs = le32_to_cpu(flow_ctl.ulControlHandshake); + flow_repl = le32_to_cpu(flow_ctl.ulFlowReplace); + + if (CP210X_SERIAL_DTR_SHIFT(CP210X_SERIAL_DTR_FLOW_CTL) == (ctl_hs & CP210X_SERIAL_DTR_MASK)) + auto_dtr = true; + else + auto_dtr = false; + + if (CP210X_SERIAL_RTS_SHIFT(CP210X_SERIAL_RTS_FLOW_CTL) == (flow_repl & CP210X_SERIAL_RTS_MASK)) + auto_rts = true; + else + auto_rts = false; + + if (auto_dtr || auto_rts) + return 0; + return cp210x_write_u16_reg(port, CP210X_SET_MHS, control); }