Message ID | 20230719025509.3007986-3-Meng.Li@windriver.com |
---|---|
State | New |
Headers | show
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Patches used to add platform specific data for Intel Stratix10 platform
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diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index ea788a920eab..435f1cc52af3 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -490,7 +490,7 @@ usbphy0: usbphy@0 { }; usb0: usb@ffb00000 { - compatible = "snps,dwc2"; + compatible = "intel,socfpga-stratix10-hsotg", "snps,dwc2"; reg = <0xffb00000 0x40000>; interrupts = <0 93 4>; phys = <&usbphy0>; @@ -504,7 +504,7 @@ usb0: usb@ffb00000 { }; usb1: usb@ffb40000 { - compatible = "snps,dwc2"; + compatible = "intel,socfpga-stratix10-hsotg", "snps,dwc2"; reg = <0xffb40000 0x40000>; interrupts = <0 94 4>; phys = <&usbphy0>;
The DWC2 USB controller on the Stratix10 platform does not support clock gating, so use the chip specific "intel,socfpga-stratix10-hsotg" compatible. Signed-off-by: Meng Li <Meng.Li@windriver.com> --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)