From patchwork Wed Apr 12 15:18:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 672820 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82C96C7619A for ; Wed, 12 Apr 2023 15:21:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230363AbjDLPVF (ORCPT ); Wed, 12 Apr 2023 11:21:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231395AbjDLPVA (ORCPT ); Wed, 12 Apr 2023 11:21:00 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 482B29038; Wed, 12 Apr 2023 08:20:27 -0700 (PDT) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33CCNbXE002432; Wed, 12 Apr 2023 17:19:30 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=FbOTl+8MNsgRED5FCS4rKIwqJQZWuMOClivGmNkcn8g=; b=twcwMM/5vdZgZt60zPG3pi6x6GATLTS66qluOA1VBnvWt6ihd2SyX9/8ze1C47q92tQO EMGMUD4oGSbdZZZqjaa1+oLEaKAJR2ogLv8lagrQB3/IGiXzex/RBK67WBBvr8i9wA+M xOlQ9qdqJaYbFqZhzQ7d4Og9GrCSqcHMbvcXnICNISmTthJyWnA4AdC0dMd57XqK2bxW WIQVIt7Ueu0fQFxhqPFqC+DxLHDWBEJNOf2bLG9P5NgGmJrKtvHPzh0PB4FHIpB7yxnO gdfko8lbmbjhUlSTno6Go65l9Eu+loQV26tp1r5tzpoPYAMQs8KLtJiDJMRu9yI59lPW 2Q== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3pws9u2nac-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Apr 2023 17:19:29 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 8BC04100039; Wed, 12 Apr 2023 17:18:41 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 849BD218612; Wed, 12 Apr 2023 17:18:41 +0200 (CEST) Received: from localhost (10.48.1.102) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 12 Apr 2023 17:18:38 +0200 From: Fabrice Gasnier To: , , , , CC: , , , , , , Subject: [PATCH 1/4] usb: dwc2: improve error handling in __dwc2_lowlevel_hw_enable Date: Wed, 12 Apr 2023 17:18:28 +0200 Message-ID: <20230412151831.3069211-2-fabrice.gasnier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230412151831.3069211-1-fabrice.gasnier@foss.st.com> References: <20230412151831.3069211-1-fabrice.gasnier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.1.102] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-12_07,2023-04-12_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Add error handling in __dwc2_lowlevel_hw_enable() that may leave the clocks and regulators enabled upon error. Signed-off-by: Fabrice Gasnier --- drivers/usb/dwc2/platform.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c index d1589ba7d322..c431ce6c119f 100644 --- a/drivers/usb/dwc2/platform.c +++ b/drivers/usb/dwc2/platform.c @@ -104,7 +104,7 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) if (hsotg->clk) { ret = clk_prepare_enable(hsotg->clk); if (ret) - return ret; + goto err_dis_reg; } if (hsotg->uphy) { @@ -113,10 +113,25 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type); } else { ret = phy_init(hsotg->phy); - if (ret == 0) + if (ret == 0) { ret = phy_power_on(hsotg->phy); + if (ret) + phy_exit(hsotg->phy); + } } + if (ret) + goto err_dis_clk; + + return 0; + +err_dis_clk: + if (hsotg->clk) + clk_disable_unprepare(hsotg->clk); + +err_dis_reg: + regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); + return ret; }