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Wed, 15 Feb 2023 01:32:11 -0800 Received: from xhdpiyushm40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Wed, 15 Feb 2023 03:32:08 -0600 From: Piyush Mehta To: , , , , CC: , , , , , , Piyush Mehta Subject: [PATCH 1/2] dt-bindings: usb: dwc3: Add snps,ulpi-ext-vbus-drv quirk Date: Wed, 15 Feb 2023 15:01:45 +0530 Message-ID: <20230215093146.5812-2-piyush.mehta@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230215093146.5812-1-piyush.mehta@amd.com> References: <20230215093146.5812-1-piyush.mehta@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000E63F:EE_|CH0PR12MB5186:EE_ X-MS-Office365-Filtering-Correlation-Id: 2c1def08-6361-4851-dbe9-08db0f379096 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ABI5sB1knQYdv6WSFGuivEz5awnnzYWEf4YSCS6lIJGlaouZ4zkjYwjOssBSrQi22omfe8FNIind/Hp19IK1/pXrpHJDiGY769/lPdA/La4VOIFTVtrsiVxoQBe8RLkYycMeHUn3osGbZyZOvpYshIxPB7bP61I3YXfqNw/oEU/mPyQvJ1yFAmFrY3xAhQunjn9PG7N6OpdQ6kIa/NSakDXLODPTk7jIWJ1zcgZz5ceFe6wbUw/XA91E2feuIjgimB19+/kg/ARFzo67/hy2FTryCLrKH1O3aLdaBqoCl3aIDZDjBF6AAE/DLOd23/iFVQdme8m7oBHnMeJPoWl+ddU9LXXcJ5W3D8XmoM0EqGc72A7DSqmneUWaAEQXcUTEDv16EgtzEpE0wvPctt3SpWpsrQtMkwYwYI2ONtEe+DgCcm9M1m1dDazRtlM1mxUIeUN3aTL2FyO5tPC+2EsE9hxTV8mh9FN6Jkys6u4NYU/4t+gWVQi07TarZn30TPXjQQtDcuoV660yjAGZDl23m77unQ1VvjZ33YxC3VbWO/6J6w9SWPQtn19iatUtEvaaBb26uRUBjo5NPe85kwomsmvuDaKJGpWMhH8VJvQEaO5FYrZ1ULERZ5PgDg1LJ7Qxn+7dwAaKIiTadRCrKyJyU9x+B+4w/oCX6kKOFFsd9w8ppuvroU352XXs02rJKr35WxibOVPLd7HcuQXKg8w/MWQ3ARth1dp9LrYyyynZVig= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230025)(4636009)(396003)(39860400002)(376002)(136003)(346002)(451199018)(46966006)(40470700004)(36840700001)(44832011)(5660300002)(2906002)(336012)(86362001)(82310400005)(83380400001)(40460700003)(426003)(8936002)(316002)(4326008)(8676002)(70206006)(356005)(70586007)(2616005)(26005)(47076005)(41300700001)(82740400003)(81166007)(36756003)(54906003)(36860700001)(110136005)(40480700001)(6666004)(478600001)(1076003)(186003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Feb 2023 09:32:32.5699 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2c1def08-6361-4851-dbe9-08db0f379096 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000E63F.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5186 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Some ULPI USB PHYs do not support an internal vBus supply, to drive the CPEN pin properly, it requires configuration of the ULPI DRVVBUSEXTERNAL bit of the USB ULPI PHY OTG_CTRL register. Added 'snps,ulpi-ext-vbus-drv' DT property to configure the USB2 PHY to drives VBUS with an external supply. When the ULPIEXTVBUSDRV bit is set to '1' in the Global USB2 PHY Configuration registers, PHY drive vBus with an external 5V supply source. Signed-off-by: Piyush Mehta Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index 6d78048c4613..4e4a2dfb77b1 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -246,6 +246,14 @@ properties: of resume. This option is to support certain legacy ULPI PHYs. type: boolean + snps,ulpi-ext-vbus-drv: + description: + Some ULPI USB PHY does not support internal VBUS supply, and driving + the CPEN pin, requires the configuration of the ulpi DRVVBUSEXTERNAL + bit. When set, the xhci host will configure the USB2 PHY drives VBUS + with an external supply. + type: boolean + snps,is-utmi-l1-suspend: description: True when DWC3 asserts output signal utmi_l1_suspend_n, false when