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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/renesas,rzv2m-usb3drd.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/V2M USB 3.1 DRD controller
+
+maintainers:
+ - Biju Das <biju.das.jz@bp.renesas.com>
+
+description: |
+ The RZ/V2{M, MA} USB3.1 DRD module supports the following functions
+ * Role swapping function by the ID pin of the Micro-AB receptacle
+ * Battery Charging Specification Revision 1.2
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - renesas,r9a09g011-usb3drd # RZ/V2M
+ - renesas,r9a09g055-usb3drd # RZ/V2MA
+ - const: renesas,rzv2m-usb3drd
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Peripheral AXI clock
+ - description: APB clock
+
+ clock-names:
+ items:
+ - const: peri_axi
+ - const: apb
+
+ power-domains:
+ maxItems: 1
+
+ resets:
+ items:
+ - description: DRD reset
+ - description: Peripheral reset
+
+ reset-names:
+ items:
+ - const: drd_reset
+ - const: aresetn_p
+
+ ranges: true
+
+ '#address-cells':
+ enum: [ 1, 2 ]
+
+ '#size-cells':
+ enum: [ 1, 2 ]
+
+ usb3peri:
+ $ref: /schemas/usb/renesas,usb3-peri.yaml
+
+patternProperties:
+ "^usb@[0-9a-f]+$":
+ type: object
+ $ref: renesas,usb-xhci.yaml#
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - power-domains
+ - resets
+ - reset-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/r9a09g011-cpg.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ usb3drd: usb@85070000 {
+ compatible = "renesas,r9a09g011-usb3drd", "renesas,rzv2m-usb3drd";
+ reg = <0x85070000 0x1000>;
+ clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_P>,
+ <&cpg CPG_MOD R9A09G011_USB_PCLK>;
+ clock-names = "peri_axi", "apb";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A09G011_USB_DRD_RESET>,
+ <&cpg R9A09G011_USB_ARESETN_P>;
+ reset-names = "drd_reset", "aresetn_p";
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ usb3host: usb@85060000 {
+ compatible = "renesas,r9a09g011-xhci",
+ "renesas,rzv2m-xhci";
+ reg = <0x85060000 0x2000>;
+ interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_H>,
+ <&cpg CPG_MOD R9A09G011_USB_PCLK>;
+ clock-names = "host_axi", "reg";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A09G011_USB_ARESETN_H>;
+ };
+
+ usb3peri: usb3peri {
+ compatible = "renesas,r9a09g011-usb3-peri",
+ "renesas,rzv2m-usb3-peri";
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "all_p", "drd", "bc", "gpi";
+ clocks = <&cpg CPG_MOD R9A09G011_USB_ACLK_P>,
+ <&cpg CPG_MOD R9A09G011_USB_PCLK>;
+ clock-names = "aclk", "reg";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A09G011_USB_ARESETN_P>;
+ };
+ };
Add device tree bindings for the RZ/V2{M, MA} USB3DRD module. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- .../bindings/usb/renesas,rzv2m-usb3drd.yaml | 123 ++++++++++++++++++ 1 file changed, 123 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/renesas,rzv2m-usb3drd.yaml