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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Shawn Guo , Sascha Hauer , NXP Linux Team Cc: Pengutronix Kernel Team , Fabio Estevam , devicetree@vger.kernel.org, , linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org, Linux Kernel Mailing List , Dong Aisheng , Clark Wang , Jacky Bai Subject: [PATCH v9 01/12] arm64: dts: freescale: Add adma subsystem dtsi for imx8dxl Date: Tue, 7 Jun 2022 14:16:14 +0300 Message-Id: <20220607111625.1845393-2-abel.vesa@nxp.com> X-Mailer: git-send-email 2.34.3 In-Reply-To: <20220607111625.1845393-1-abel.vesa@nxp.com> References: <20220607111625.1845393-1-abel.vesa@nxp.com> X-ClientProxiedBy: AM6P195CA0028.EURP195.PROD.OUTLOOK.COM (2603:10a6:209:81::41) To VI1PR04MB4688.eurprd04.prod.outlook.com (2603:10a6:803:6a::30) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d2042837-7ec6-4571-c2e3-08da4877388c X-MS-TrafficTypeDiagnostic: DB7PR04MB4890:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Clark Wang Signed-off-by: Jacky Bai Signed-off-by: Abel Vesa --- .../boot/dts/freescale/imx8dxl-ss-adma.dtsi | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi new file mode 100644 index 000000000000..4d0c75bad74c --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019-2021 NXP + */ + +&audio_ipg_clk { + clock-frequency = <160000000>; +}; + +&dma_ipg_clk { + clock-frequency = <160000000>; +}; + +&i2c0 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = ; +}; + +&i2c1 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = ; +}; + +&i2c2 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = ; +}; + +&i2c3 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = ; +}; + +&lpuart0 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart"; + interrupts = ; +}; + +&lpuart1 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart"; + interrupts = ; +}; + +&lpuart2 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart"; + interrupts = ; +}; + +&lpuart3 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart"; + interrupts = ; +};