From patchwork Wed Mar 23 05:35:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aswath Govindraju X-Patchwork-Id: 553870 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6C7BC433F5 for ; Wed, 23 Mar 2022 05:35:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241856AbiCWFhJ (ORCPT ); Wed, 23 Mar 2022 01:37:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58004 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241852AbiCWFhE (ORCPT ); Wed, 23 Mar 2022 01:37:04 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0838B70927; Tue, 22 Mar 2022 22:35:34 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 22N5ZWbM045084; Wed, 23 Mar 2022 00:35:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1648013732; bh=/QEiiVGlzdOsl7qH7NV03cnxdNoCqW4P0FqbZASu7U8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=CzwLnhdFQ//6RE3KB/bDrX9cGIbtmfwQsV9poppAjUHYiYy6pjT7ARE4/1E9zQ3FS DaX5u1Bq4QalXxmyDHFj9SkI+IEf/EteLGsnO/C7VYqHl0w5ceYwI2Kdom9alOmcjg oLw6iSY7kf9H0b04uRnQ/i8UUUHL3kJdERgs7+C0= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 22N5ZWSt095584 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 23 Mar 2022 00:35:32 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Wed, 23 Mar 2022 00:35:31 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Wed, 23 Mar 2022 00:35:31 -0500 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 22N5ZOoP038635; Wed, 23 Mar 2022 00:35:28 -0500 From: Aswath Govindraju CC: , , , Felipe Balbi , Krzysztof Kozlowski , Rob Herring , Greg Kroah-Hartman , Roger Quadros , Vignesh Raghavendra , Kishon Vijay Abraham I , Aswath Govindraju Subject: [PATCH 1/2] dt-bindings: usb: Add documentation for AM62 USB Wrapper module Date: Wed, 23 Mar 2022 11:05:23 +0530 Message-ID: <20220323053524.7009-2-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220323053524.7009-1-a-govindraju@ti.com> References: <20220323053524.7009-1-a-govindraju@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Add bindings for the TI's AM62 wrapper module for the Synopsys USBSS-DRD controller. Signed-off-by: Aswath Govindraju Reviewed-by: Roger Quadros --- .../devicetree/bindings/usb/ti,am62-usb.yaml | 98 +++++++++++++++++++ 1 file changed, 98 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/ti,am62-usb.yaml diff --git a/Documentation/devicetree/bindings/usb/ti,am62-usb.yaml b/Documentation/devicetree/bindings/usb/ti,am62-usb.yaml new file mode 100644 index 000000000000..4bb139d1926d --- /dev/null +++ b/Documentation/devicetree/bindings/usb/ti,am62-usb.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bindings for the TI's AM62 wrapper module for the Synopsys USBSS-DRD controller + +maintainers: + - Aswath Govindraju + +properties: + compatible: + const: ti,am62-usb + + reg: + maxItems: 1 + + ranges: true + + power-domains: + description: + PM domain provider node and an args specifier containing + the USB ISO device id value. See, + Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml + maxItems: 1 + + clocks: + description: Clock phandles to usb2_refclk + maxItems: 1 + + clock-names: + items: + - const: ref + + id-gpio: + description: + GPIO to be used as ID pin + maxItems: 1 + + interrupts: + description: + interrupt line to be used for detecting changes in VBUS + + ti,vbus-divider: + description: + Should be present if USB VBUS line is connected to the + VBUS pin of the SoC via a 1/3 voltage divider. + type: boolean + + ti,syscon-phy-pll-refclk: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to the SYSCON entry + - description: USB phy control register offset within SYSCON + description: Specifier for configuring frequency of ref clock input. + + '#address-cells': + const: 2 + + '#size-cells': + const: 2 + +required: + - compatible + - reg + - power-domains + - clocks + - clock-names + - interrupts + - ti,syscon-phy-pll-refclk + +additionalProperties: false + +examples: + - | + #include + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + dwc3-usb@f910000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f910000 0x00 0x800>; + interrupts = ; /* MISC IRQ */ + clocks = <&k3_clks 162 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; + id-gpio = <&main_gpio1 51 GPIO_ACTIVE_LOW>; + #address-cells = <2>; + #size-cells = <2>; + }; + };