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Mon, 10 Jan 2022 20:19:58 +0000 From: Robert Hancock To: linux-usb@vger.kernel.org Cc: Thinh.Nguyen@synopsys.com, robh+dt@kernel.org, devicetree@vger.kernel.org, michal.simek@xilinx.com, balbi@kernel.org, gregkh@linuxfoundation.org, mounika.grace.akula@xilinx.com, manish.narani@xilinx.com, Robert Hancock Subject: [PATCH v3 5/5] arm64: dts: zynqmp: Add DWC3 USB reference clock period configuration Date: Mon, 10 Jan 2022 14:19:36 -0600 Message-Id: <20220110201936.1371891-6-robert.hancock@calian.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220110201936.1371891-1-robert.hancock@calian.com> References: <20220110201936.1371891-1-robert.hancock@calian.com> X-ClientProxiedBy: MWHPR1201CA0002.namprd12.prod.outlook.com (2603:10b6:301:4a::12) To YT2PR01MB6270.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b01:4d::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e34eda41-e83d-4594-2f6f-08d9d47692f7 X-MS-TrafficTypeDiagnostic: YT1PR01MB8505:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4303; 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Signed-off-by: Robert Hancock --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 74e66443e4ce..2f531707d5d4 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -828,6 +828,8 @@ dwc3_0: usb@fe200000 { #stream-id-cells = <1>; iommus = <&smmu 0x860>; snps,quirk-frame-length-adjustment = <0x20>; + snps,ref-clock-period-ns = <50>; + snps,ref-clock-fladj = <0>; /* dma-coherent; */ }; }; @@ -855,6 +857,8 @@ dwc3_1: usb@fe300000 { #stream-id-cells = <1>; iommus = <&smmu 0x861>; snps,quirk-frame-length-adjustment = <0x20>; + snps,ref-clock-period-ns = <50>; + snps,ref-clock-fladj = <0>; /* dma-coherent; */ }; };