From patchwork Mon Feb 1 07:00:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?Q2h1bmZlbmcgWXVuICjkupHmmKXls7Ap?= X-Patchwork-Id: 374456 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3314C433E6 for ; Mon, 1 Feb 2021 07:07:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9BCF364E31 for ; Mon, 1 Feb 2021 07:07:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232302AbhBAHG6 (ORCPT ); Mon, 1 Feb 2021 02:06:58 -0500 Received: from mailgw02.mediatek.com ([1.203.163.81]:49105 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S231508AbhBAHBT (ORCPT ); Mon, 1 Feb 2021 02:01:19 -0500 X-UUID: ef0a49aeaa4441238560bcf622506f3a-20210201 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=bGjHJF6RZKKemR27qW1pqZryA/7HPE2P9xKrjpMmo0Y=; b=BDEBco63DWaSbPB7uZaJjo6Ud/H5NzTkBLZLmCuGfvTQV7oeSXDc8xjd01RyJ2E0HZq15GmIhaW3NPnN4T0/b8DHl2ywPO2HRjhgbt1/1RjG6dX+itLJnyP6HmNe7hv6CHJqDxOGh30acyNxVquKPJNKvhHf1o2bYAhA43tPQlU=; X-UUID: ef0a49aeaa4441238560bcf622506f3a-20210201 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 862012202; Mon, 01 Feb 2021 15:00:33 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 1 Feb 2021 15:00:30 +0800 Received: from mtkslt301.mediatek.inc (10.21.14.114) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 1 Feb 2021 15:00:30 +0800 From: Chunfeng Yun To: Rob Herring , Matthias Brugger CC: Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Chun-Kuang Hu , Philipp Zabel , Min Guo , , , , , Subject: [PATCH next v3 13/16] arm64: dts: mediatek: mt8183: fix dtbs_check warning Date: Mon, 1 Feb 2021 15:00:13 +0800 Message-ID: <20210201070016.41721-13-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210201070016.41721-1-chunfeng.yun@mediatek.com> References: <20210201070016.41721-1-chunfeng.yun@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: F35C95C5F653576E0C7267B963AB40C92DF40E2A3A3BC513DF55976A89FB3E582000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Harmonize node names, compatibles and properties. Signed-off-by: Chunfeng Yun --- v3: remove property clock-names suggested by CK v2: no changes --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) -- 2.18.0 diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 5b782a4769e7..12a3c7f03e1a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -865,7 +865,7 @@ ranges; status = "disabled"; - usb_host: xhci@11200000 { + usb_host: usb@11200000 { compatible = "mediatek,mt8183-xhci", "mediatek,mtk-xhci"; reg = <0 0x11200000 0 0x1000>; @@ -908,11 +908,10 @@ status = "disabled"; }; - mipi_tx0: mipi-dphy@11e50000 { + mipi_tx0: dsi-phy@11e50000 { compatible = "mediatek,mt8183-mipi-tx"; reg = <0 0x11e50000 0 0x1000>; clocks = <&apmixedsys CLK_APMIXED_MIPID0_26M>; - clock-names = "ref_clk"; #clock-cells = <0>; #phy-cells = <0>; clock-output-names = "mipi_tx0_pll"; @@ -931,11 +930,10 @@ }; }; - u3phy: usb-phy@11f40000 { + u3phy: t-phy@11f40000 { compatible = "mediatek,mt8183-tphy", "mediatek,generic-tphy-v2"; #address-cells = <1>; - #phy-cells = <1>; #size-cells = <1>; ranges = <0 0 0x11f40000 0x1000>; status = "okay";