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[23.83.240.116]) by smtp.gmail.com with ESMTPSA id z5sm9816901pfn.20.2020.10.18.19.34.40 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 18 Oct 2020 19:34:41 -0700 (PDT) From: Dejin Zheng To: balbi@kernel.org, gregkh@linuxfoundation.org, sergei.shtylyov@gmail.com, linux-usb@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Dejin Zheng Subject: [PATCH v2] usb: dwc3: core: fix a issue about clear connect state Date: Mon, 19 Oct 2020 10:34:35 +0800 Message-Id: <20201019023435.5482-1-zhengdejin5@gmail.com> X-Mailer: git-send-email 2.25.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org According to Synopsys Programming Guide chapter 2.2 Register Resets, it cannot reset the DCTL register by setting DCTL.CSFTRST for core soft reset, if DWC3 controller as a slave device and stay connected with a usb host, then, while rebooting linux, it will fail to reinitialize dwc3 as a slave device when the DWC3 controller did not power off. because the connection status is incorrect, so we also need to clear DCTL.RUN_STOP bit for disabling connect when doing core soft reset. Fixes: f59dcab176293b6 ("usb: dwc3: core: improve reset sequence") Signed-off-by: Dejin Zheng --- v1 -> v2: * modify some commit messages by Sergei's suggest, Thanks very much for Sergei's help! drivers/usb/dwc3/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 2eb34c8b4065..239636c454c2 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -256,6 +256,7 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc) reg = dwc3_readl(dwc->regs, DWC3_DCTL); reg |= DWC3_DCTL_CSFTRST; + reg &= ~DWC3_DCTL_RUN_STOP; dwc3_writel(dwc->regs, DWC3_DCTL, reg); /*