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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Feb 2023 13:32:43.2180 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2ef1e337-8272-4656-7ff8-08db0b6b49f0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT015.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8418 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Sanjay R Mehta AMD Yellow Carp and Pink Sardine don't support CLx state, hence disabling it. Signed-off-by: Sanjay R Mehta Signed-off-by: Basavaraj Natikar --- drivers/thunderbolt/nhi.h | 6 ++++++ drivers/thunderbolt/switch.c | 6 ++++++ drivers/thunderbolt/tb.h | 24 ++++++++++++++++++++++++ 3 files changed, 36 insertions(+) diff --git a/drivers/thunderbolt/nhi.h b/drivers/thunderbolt/nhi.h index b071802..3d8cfaf 100644 --- a/drivers/thunderbolt/nhi.h +++ b/drivers/thunderbolt/nhi.h @@ -87,6 +87,12 @@ extern const struct tb_nhi_ops icl_nhi_ops; #define PCI_DEVICE_ID_INTEL_RPL_NHI0 0xa73e #define PCI_DEVICE_ID_INTEL_RPL_NHI1 0xa76d +/* PCI IDs for AMD USB4 controllers */ +#define PCI_DEVICE_ID_AMD_YELLOW_CARP_NHI0 0x162e +#define PCI_DEVICE_ID_AMD_YELLOW_CARP_NHI1 0x162f +#define PCI_DEVICE_ID_AMD_PINK_SARDINE_NHI0 0x1668 +#define PCI_DEVICE_ID_AMD_PINK_SARDINE_NHI1 0x1669 + #define PCI_CLASS_SERIAL_USB_USB4 0x0c0340 #endif diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c index 363d712..93e4788 100644 --- a/drivers/thunderbolt/switch.c +++ b/drivers/thunderbolt/switch.c @@ -3574,6 +3574,12 @@ int tb_switch_enable_clx(struct tb_switch *sw, enum tb_clx clx) if (root_sw->generation < 4 || tb_switch_is_tiger_lake(root_sw)) return 0; + /* + * Disabling CLx by default on AMD USB4 platforms for Yellow Carp and Pink Sardine. + */ + if (tb_switch_is_yellow_carp(sw->tb->nhi) || tb_switch_is_pink_sardine(sw->tb->nhi)) + return 0; + switch (clx) { case TB_CL1: /* CL0s and CL1 are enabled and supported together */ diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h index f978697..c63a023 100644 --- a/drivers/thunderbolt/tb.h +++ b/drivers/thunderbolt/tb.h @@ -905,6 +905,30 @@ static inline bool tb_switch_is_tiger_lake(const struct tb_switch *sw) return false; } +static inline bool tb_switch_is_yellow_carp(const struct tb_nhi *nhi) +{ + if (nhi->pdev->vendor == PCI_VENDOR_ID_AMD) { + switch (nhi->pdev->device) { + case PCI_DEVICE_ID_AMD_YELLOW_CARP_NHI0: + case PCI_DEVICE_ID_AMD_YELLOW_CARP_NHI1: + return true; + } + } + return false; +} + +static inline bool tb_switch_is_pink_sardine(const struct tb_nhi *nhi) +{ + if (nhi->pdev->vendor == PCI_VENDOR_ID_AMD) { + switch (nhi->pdev->device) { + case PCI_DEVICE_ID_AMD_PINK_SARDINE_NHI0: + case PCI_DEVICE_ID_AMD_PINK_SARDINE_NHI1: + return true; + } + } + return false; +} + /** * tb_switch_is_usb4() - Is the switch USB4 compliant * @sw: Switch to check